/***************************************************************************
 *   Copyright (C) 2010 by Terraneo Federico                               *
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 *   This program is free software; you can redistribute it and/or modify  *
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 *   (at your option) any later version.                                   *
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 *   This program is distributed in the hope that it will be useful,       *
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 *   As a special exception, if other files instantiate templates or use   *
 *   macros or inline functions from this file, or you compile this file   *
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 *   this file does not by itself cause the resulting work to be covered   *
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 *   file must still be made available in accordance with the GNU General  *
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 *   Public License.                                                       *
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 *   along with this program; if not, see <http://www.gnu.org/licenses/>   *
 ***************************************************************************/

#ifndef ARCH_SETTINGS_H
#define	ARCH_SETTINGS_H

namespace miosix {

/**
 * \addtogroup Settings
 * \{
 */

/// \internal Size of vector to store registers during ctx switch (9*4=36Bytes)
/// Only sp and r4-r11 are saved here, since r0-r3,r12,lr,pc,xPSR and
/// old sp are saved by hardware on the process stack on Cortex M3 CPUs.
const unsigned char CTXSAVE_SIZE=9;

/// \internal some architectures save part of the context on their stack.
/// This constant is used to increase the stack size by the size of context
/// save frame. If zero, this architecture does not save anything on stack
/// during context save. Size is in bytes, not words.
/// MUST be divisible by 4.
const unsigned int CTXSAVE_ON_STACK=32;

/// \internal stack alignment for this specific architecture
const unsigned int CTXSAVE_STACK_ALIGNMENT=8;

/**
 * \}
 */

} //namespace miosix

#endif	/* ARCH_SETTINGS_H */
