From 0c4a0435a89b25c71b0a2847e37095833e49efac Mon Sep 17 00:00:00 2001 From: Silvano Seva Date: Fri, 19 Jul 2024 22:05:01 +0200 Subject: [PATCH] MD3x0: update radio driver --- meson.build | 4 +++- platform/drivers/baseband/radio_MD3x0.cpp | 22 +++++++++--------- platform/targets/MD-3x0/hwconfig.c | 28 +++++++++++++++++++++++ platform/targets/MD-3x0/hwconfig.h | 3 +++ platform/targets/MD-3x0/pinmap.h | 4 ++-- 5 files changed, 47 insertions(+), 14 deletions(-) diff --git a/meson.build b/meson.build index f17d7271..647642d9 100644 --- a/meson.build +++ b/meson.build @@ -161,7 +161,9 @@ mdx_src = ['platform/drivers/ADC/ADC1_MDx.c', 'platform/drivers/NVM/nvmem_MDx.c', 'platform/drivers/audio/audio_MDx.c', 'platform/drivers/baseband/HR_Cx000.cpp', - 'platform/drivers/tones/toneGenerator_MDx.cpp'] + 'platform/drivers/tones/toneGenerator_MDx.cpp', + 'platform/drivers/SPI/spi_custom.c', + 'platform/drivers/SPI/spi_bitbang.c'] ## ## GDx family: Radioddity GD-77 and Baofeng DM-1801 diff --git a/platform/drivers/baseband/radio_MD3x0.cpp b/platform/drivers/baseband/radio_MD3x0.cpp index eaf343b2..bc3b953d 100644 --- a/platform/drivers/baseband/radio_MD3x0.cpp +++ b/platform/drivers/baseband/radio_MD3x0.cpp @@ -1,5 +1,5 @@ /*************************************************************************** - * Copyright (C) 2021 - 2023 by Federico Amedeo Izzo IU2NUO, * + * Copyright (C) 2021 - 2024 by Federico Amedeo Izzo IU2NUO, * * Niccolò Izzo IU2KIN * * Frederik Saraci IU2NRO * * Silvano Seva IU2KWO * @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -42,7 +43,7 @@ static uint8_t txpwr_hi = 0; // APC voltage for TX output pow static enum opstatus radioStatus; // Current operating status -static HR_C5000& C5000 = HR_C5000::instance(); // HR_C5000 driver +static HR_C5000 C5000((const struct spiDevice *) &c5000_spi, { DMR_CS }); /* * Parameters for RSSI voltage (mV) to input power (dBm) conversion. @@ -128,14 +129,13 @@ void radio_init(const rtxStatus_t *rtxState) nvm_readCalibData(&calData); /* - * Enable and configure PLL + * Enable and configure PLL and HR_C5000 */ - gpio_setPin(PLL_PWR); - SKY73210_init(); + spiBitbang_init(&pll_spi); + spiBitbang_init(&c5000_spi); - /* - * Configure HR_C5000 - */ + gpio_setPin(PLL_PWR); + SKY73210_init(&pll); C5000.init(); /* @@ -147,7 +147,7 @@ void radio_init(const rtxStatus_t *rtxState) void radio_terminate() { - SKY73210_terminate(); + SKY73210_terminate(&pll); C5000.terminate(); gpio_clearPin(PLL_PWR); // PLL off @@ -251,7 +251,7 @@ void radio_enableRx() pllFreq -= static_cast< float >(IF_FREQ); } - SKY73210_setFrequency(pllFreq, 5); + SKY73210_setFrequency(&pll, pllFreq, 5); DAC->DHR12L1 = vtune_rx * 0xFF; gpio_setPin(RX_STG_EN); // Enable RX LNA @@ -270,7 +270,7 @@ void radio_enableTx() // Set PLL frequency. float pllFreq = static_cast< float >(config->txFrequency); if(isVhfBand) pllFreq *= 2.0f; - SKY73210_setFrequency(pllFreq, 5); + SKY73210_setFrequency(&pll, pllFreq, 5); // Set TX output power, constrain between 1W and 5W. float power = static_cast < float >(config->txPower) / 1000.0f; diff --git a/platform/targets/MD-3x0/hwconfig.c b/platform/targets/MD-3x0/hwconfig.c index 42b7c397..6e8c8189 100644 --- a/platform/targets/MD-3x0/hwconfig.c +++ b/platform/targets/MD-3x0/hwconfig.c @@ -21,7 +21,35 @@ #include #include #include +#include #include #include +const struct spiConfig spiPllCfg = +{ + .clk = { PLL_CLK }, + .mosi = { PLL_DAT }, + .miso = { PLL_DAT }, + .clkPeriod = SCK_PERIOD_FROM_FREQ(1000000), + .flags = SPI_HALF_DUPLEX +}; + +const struct spiConfig spiC5000Cfg = +{ + .clk = { DMR_CLK }, + .mosi = { DMR_MOSI }, + .miso = { DMR_MISO }, + .clkPeriod = SCK_PERIOD_FROM_FREQ(1000000), + .flags = SPI_FLAG_CPHA +}; + SPI_STM32_DEVICE_DEFINE(nvm_spi, SPI1, NULL) +SPI_BITBANG_DEVICE_DEFINE(pll_spi, spiPllCfg, NULL) +SPI_BITBANG_DEVICE_DEFINE(c5000_spi, spiC5000Cfg, NULL) + +const struct sky73210 pll = +{ + .spi = (const struct spiDevice *) &pll_spi, + .cs = { PLL_CS }, + .refClk = 16800000 +}; diff --git a/platform/targets/MD-3x0/hwconfig.h b/platform/targets/MD-3x0/hwconfig.h index eafa5577..13f5f809 100644 --- a/platform/targets/MD-3x0/hwconfig.h +++ b/platform/targets/MD-3x0/hwconfig.h @@ -28,6 +28,9 @@ extern "C" { #endif extern const struct spiDevice nvm_spi; +extern const struct spiCustomDevice pll_spi; +extern const struct spiCustomDevice c5000_spi; +extern const struct sky73210 pll; /* Device has a working real time clock */ #define CONFIG_RTC diff --git a/platform/targets/MD-3x0/pinmap.h b/platform/targets/MD-3x0/pinmap.h index fc593744..7df55cf9 100644 --- a/platform/targets/MD-3x0/pinmap.h +++ b/platform/targets/MD-3x0/pinmap.h @@ -87,13 +87,13 @@ #define FLASH_SDI GPIOB,5 /* PLL */ -#define PLL_CS GPIOD,11 +#define PLL_CS &GpioD,11 #define PLL_CLK GPIOE,4 #define PLL_DAT GPIOE,5 /* WARNING: this line is also HR_C5000 MOSI */ #define PLL_LD GPIOD,10 /* HR_C5000 */ -#define DMR_CS GPIOE,2 +#define DMR_CS &GpioE,2 #define DMR_CLK GPIOC,13 #define DMR_MOSI PLL_DAT #define DMR_MISO GPIOE,3