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Reorganized MDx nonvolatile memory devices

This commit is contained in:
Silvano Seva 2024-04-05 21:06:59 +02:00
parent 6aee71ec84
commit 15e7f562e3
5 changed files with 106 additions and 81 deletions
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39
platform/drivers/NVM/W25Qx.c
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@ -1,5 +1,5 @@
/*************************************************************************** /***************************************************************************
* Copyright (C) 2020 - 2023 by Federico Amedeo Izzo IU2NUO, * * Copyright (C) 2020 - 2024 by Federico Amedeo Izzo IU2NUO, *
* Niccolò Izzo IU2KIN * * Niccolò Izzo IU2KIN *
* Frederik Saraci IU2NRO * * Frederik Saraci IU2NRO *
* Silvano Seva IU2KWO * * Silvano Seva IU2KWO *
@ -279,14 +279,6 @@ int W25Qx_writeData(uint32_t addr, const void *buf, size_t len)
return 0; return 0;
} }
static const struct nvmParams W25Qx_params =
{
.write_size = 1,
.erase_size = SECT_SIZE,
.erase_cycles = 100000,
.type = NVM_FLASH
};
static int nvm_api_readSecReg(const struct nvmDevice *dev, uint32_t offset, void *data, size_t len) static int nvm_api_readSecReg(const struct nvmDevice *dev, uint32_t offset, void *data, size_t len)
{ {
(void) dev; (void) dev;
@ -315,27 +307,34 @@ static int nvm_api_erase(const struct nvmDevice *dev, uint32_t offset, size_t si
return W25Qx_erase(offset, size); return W25Qx_erase(offset, size);
} }
static const struct nvmParams *nvm_api_params(const struct nvmDevice *dev) const struct nvmOps W25Qx_ops =
{
(void) dev;
return &W25Qx_params;
}
const struct nvmApi W25Qx_api =
{ {
.read = nvm_api_read, .read = nvm_api_read,
.write = nvm_api_write, .write = nvm_api_write,
.erase = nvm_api_erase, .erase = nvm_api_erase,
.sync = NULL, .sync = NULL,
.params = nvm_api_params
}; };
const struct nvmApi W25Qx_secReg_api = const struct nvmOps W25Qx_secReg_ops =
{ {
.read = nvm_api_readSecReg, .read = nvm_api_readSecReg,
.write = NULL, .write = NULL,
.erase = NULL, .erase = NULL,
.sync = NULL, .sync = NULL,
.params = nvm_api_params };
const struct nvmInfo W25Qx_info =
{
.write_size = 1,
.erase_size = SECT_SIZE,
.erase_cycles = 100000,
.device_info = NVM_FLASH | NVM_WRITE | NVM_BITWRITE | NVM_ERASE
};
const struct nvmInfo W25Qx_secReg_info =
{
.write_size = 0,
.erase_size = 0,
.erase_cycles = 0,
.device_info = NVM_FLASH
}; };

55
platform/drivers/NVM/W25Qx.h
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@ -1,5 +1,5 @@
/*************************************************************************** /***************************************************************************
* Copyright (C) 2020 - 2023 by Federico Amedeo Izzo IU2NUO, * * Copyright (C) 2020 - 2024 by Federico Amedeo Izzo IU2NUO, *
* Niccolò Izzo IU2KIN * * Niccolò Izzo IU2KIN *
* Frederik Saraci IU2NRO * * Frederik Saraci IU2NRO *
* Silvano Seva IU2KWO * * Silvano Seva IU2KWO *
@ -32,28 +32,57 @@
*/ */
/** /**
* Device driver API for W25Qx main memory. * Driver data structure for W25Qx security registers.
*/ */
extern const struct nvmApi W25Qx_api; struct w25qSecRegDevice
{
const void *priv; ///< Device driver private data
const struct nvmOps *ops; ///< Device operations
const struct nvmInfo *info; ///< Device info
const size_t size; ///< Device size
const uint32_t baseAddr; ///< Register base address
};
/** /**
* Device driver API for W25Qx security registers. * Device driver and information block for W25Qx main memory.
*/ */
extern const struct nvmApi W25Qx_secReg_api; extern const struct nvmOps W25Qx_ops;
extern const struct nvmInfo W25Qx_info;
/** /**
* Instantiate an W25Qx nonvolatile memory device. * Instantiate an W25Qx nonvolatile memory device.
* *
* @param name: device name. * @param name: device name.
* @param driver: device driver API. * @param sz: memory size, in bytes.
*/ */
#define W25Qx_DEVICE_DEFINE(name, driver) \ #define W25Qx_DEVICE_DEFINE(name, sz) \
struct nvmDevice name = \ struct nvmDevice name = \
{ \ { \
.config = NULL, \ .ops = &W25Qx_ops, \
.priv = NULL, \ .info = &W25Qx_info, \
.api = &driver \ .size = sz \
};
/**
* Device driver and information block for W25Qx security registers area.
*/
extern const struct nvmOps W25Qx_secReg_ops;
extern const struct nvmInfo W25Qx_secReg_info;
/**
* Instantiate an W25Qx security register memory device.
*
* @param name: device name.
* @param base: security register base address.
* @param sz: memory size, in bytes.
*/
#define W25Qx_SECREG_DEFINE(name, base, sz) \
struct w25qSecRegDevice name = \
{ \
.ops = &W25Qx_secReg_ops, \
.info = &W25Qx_secReg_info, \
.size = sz, \
.baseAddr = base \
}; };
/** /**

31
platform/drivers/NVM/nvmem_MD3x0.c
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@ -1,5 +1,5 @@
/*************************************************************************** /***************************************************************************
* Copyright (C) 2020 - 2023 by Federico Amedeo Izzo IU2NUO, * * Copyright (C) 2020 - 2024 by Federico Amedeo Izzo IU2NUO, *
* Niccolò Izzo IU2KIN * * Niccolò Izzo IU2KIN *
* Frederik Saraci IU2NRO * * Frederik Saraci IU2NRO *
* Silvano Seva IU2KWO * * Silvano Seva IU2KWO *
@ -26,30 +26,28 @@
#include <utils.h> #include <utils.h>
#include "W25Qx.h" #include "W25Qx.h"
W25Qx_DEVICE_DEFINE(W25Q128_main, W25Qx_api) W25Qx_DEVICE_DEFINE(eflash, 0x1000000) // 16 MB, 128 Mbit
W25Qx_DEVICE_DEFINE(W25Q128_secr, W25Qx_secReg_api) W25Qx_SECREG_DEFINE(cal1, 0x1000, 0x100) // 256 byte
W25Qx_SECREG_DEFINE(cal2, 0x2000, 0x100) // 256 byte
static const struct nvmArea areas[] = static const struct nvmDescriptor nvmDevices[] =
{ {
{ {
.name = "External flash", .name = "External flash",
.dev = &W25Q128_main, .dev = &eflash,
.startAddr = 0x0000, .partNum = 0,
.size = 0x1000000, // 16 MB, 128 Mbit
.partitions = NULL .partitions = NULL
}, },
{ {
.name = "Cal. data 1", .name = "Cal. data 1",
.dev = &W25Q128_secr, .dev = (const struct nvmDevice *) &cal1,
.startAddr = 0x1000, .partNum = 0,
.size = 0x100, // 256 byte
.partitions = NULL .partitions = NULL
}, },
{ {
.name = "Cal. data 2", .name = "Cal. data 2",
.dev = &W25Q128_secr, .dev = (const struct nvmDevice *) &cal2,
.startAddr = 0x2000, .partNum = 0,
.size = 0x100, // 256 byte
.partitions = NULL .partitions = NULL
} }
}; };
@ -65,11 +63,12 @@ void nvm_terminate()
W25Qx_terminate(); W25Qx_terminate();
} }
size_t nvm_getMemoryAreas(const struct nvmArea **list) const struct nvmDescriptor *nvm_getDesc(const size_t index)
{ {
*list = &areas[0]; if(index > 3)
return NULL;
return (sizeof(areas) / sizeof(struct nvmArea)); return &nvmDevices[index];
} }
void nvm_readCalibData(void *buf) void nvm_readCalibData(void *buf)

31
platform/drivers/NVM/nvmem_MD9600.c
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@ -1,5 +1,5 @@
/*************************************************************************** /***************************************************************************
* Copyright (C) 2020 - 2023 by Federico Amedeo Izzo IU2NUO, * * Copyright (C) 2020 - 2024 by Federico Amedeo Izzo IU2NUO, *
* Niccolò Izzo IU2KIN * * Niccolò Izzo IU2KIN *
* Frederik Saraci IU2NRO * * Frederik Saraci IU2NRO *
* Silvano Seva IU2KWO * * Silvano Seva IU2KWO *
@ -26,30 +26,28 @@
#include <utils.h> #include <utils.h>
#include "W25Qx.h" #include "W25Qx.h"
W25Qx_DEVICE_DEFINE(W25Q128_main, W25Qx_api) W25Qx_DEVICE_DEFINE(eflash, 0x1000000) // 16 MB, 128 Mbit
W25Qx_DEVICE_DEFINE(W25Q128_secr, W25Qx_secReg_api) W25Qx_SECREG_DEFINE(cal1, 0x1000, 0x100) // 256 byte
W25Qx_SECREG_DEFINE(cal2, 0x2000, 0x100) // 256 byte
static const struct nvmArea areas[] = static const struct nvmDescriptor nvmDevices[] =
{ {
{ {
.name = "External flash", .name = "External flash",
.dev = &W25Q128_main, .dev = &eflash,
.startAddr = 0x0000, .partNum = 0,
.size = 0x1000000, // 16 MB, 128 Mbit
.partitions = NULL .partitions = NULL
}, },
{ {
.name = "Cal. data 1", .name = "Cal. data 1",
.dev = &W25Q128_secr, .dev = (const struct nvmDevice *) &cal1,
.startAddr = 0x1000, .partNum = 0,
.size = 0x100, // 256 byte
.partitions = NULL .partitions = NULL
}, },
{ {
.name = "Cal. data 2", .name = "Cal. data 2",
.dev = &W25Q128_secr, .dev = (const struct nvmDevice *) &cal2,
.startAddr = 0x2000, .partNum = 0,
.size = 0x100, // 256 byte
.partitions = NULL .partitions = NULL
} }
}; };
@ -65,11 +63,12 @@ void nvm_terminate()
W25Qx_terminate(); W25Qx_terminate();
} }
size_t nvm_getMemoryAreas(const struct nvmArea **list) const struct nvmDescriptor *nvm_getDesc(const size_t index)
{ {
*list = &areas[0]; if(index > 3)
return NULL;
return (sizeof(areas) / sizeof(struct nvmArea)); return &nvmDevices[index];
} }
void nvm_readCalibData(void *buf) void nvm_readCalibData(void *buf)

31
platform/drivers/NVM/nvmem_MDUV3x0.c
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@ -1,5 +1,5 @@
/*************************************************************************** /***************************************************************************
* Copyright (C) 2020 - 2023 by Federico Amedeo Izzo IU2NUO, * * Copyright (C) 2020 - 2024 by Federico Amedeo Izzo IU2NUO, *
* Niccolò Izzo IU2KIN * * Niccolò Izzo IU2KIN *
* Frederik Saraci IU2NRO * * Frederik Saraci IU2NRO *
* Silvano Seva IU2KWO * * Silvano Seva IU2KWO *
@ -26,30 +26,28 @@
#include <utils.h> #include <utils.h>
#include "W25Qx.h" #include "W25Qx.h"
W25Qx_DEVICE_DEFINE(W25Q128_main, W25Qx_api) W25Qx_DEVICE_DEFINE(eflash, 0x1000000) // 16 MB, 128 Mbit
W25Qx_DEVICE_DEFINE(W25Q128_secr, W25Qx_secReg_api) W25Qx_SECREG_DEFINE(cal1, 0x1000, 0x100) // 256 byte
W25Qx_SECREG_DEFINE(cal2, 0x2000, 0x100) // 256 byte
static const struct nvmArea areas[] = static const struct nvmDescriptor nvmDevices[] =
{ {
{ {
.name = "External flash", .name = "External flash",
.dev = &W25Q128_main, .dev = &eflash,
.startAddr = 0x0000, .partNum = 0,
.size = 0x1000000, // 16 MB, 128 Mbit
.partitions = NULL .partitions = NULL
}, },
{ {
.name = "Cal. data 1", .name = "Cal. data 1",
.dev = &W25Q128_secr, .dev = (const struct nvmDevice *) &cal1,
.startAddr = 0x1000, .partNum = 0,
.size = 0x100, // 256 byte
.partitions = NULL .partitions = NULL
}, },
{ {
.name = "Cal. data 2", .name = "Cal. data 2",
.dev = &W25Q128_secr, .dev = (const struct nvmDevice *) &cal2,
.startAddr = 0x2000, .partNum = 0,
.size = 0x100, // 256 byte
.partitions = NULL .partitions = NULL
} }
}; };
@ -65,11 +63,12 @@ void nvm_terminate()
W25Qx_terminate(); W25Qx_terminate();
} }
size_t nvm_getMemoryAreas(const struct nvmArea **list) const struct nvmDescriptor *nvm_getDesc(const size_t index)
{ {
*list = &areas[0]; if(index > 3)
return NULL;
return (sizeof(areas) / sizeof(struct nvmArea)); return &nvmDevices[index];
} }
void nvm_readCalibData(void *buf) void nvm_readCalibData(void *buf)