Updated CMSIS header files for STM32F4 to version 2.6.7

meson.build

@@ -180,7 +180,7 @@ stm32f405_inc = ['platform/mcu/CMSIS/Include',
                  'platform/mcu/STM32F4xx/drivers',
                  'platform/mcu/STM32F4xx/drivers/usb']
 
-stm32f405_def = {'STM32F40_41xxx': '', 'HSE_VALUE':'8000000',
+stm32f405_def = {'STM32F405xx': '', 'HSE_VALUE':'8000000',
                  '_POSIX_PRIORITY_SCHEDULING':''}
 
 ##

platform/mcu/CMSIS/Device/ST/STM32F4xx/Include/system_stm32f4xx.h

@@ -2,25 +2,33 @@
   ******************************************************************************
   * @file    system_stm32f4xx.h
   * @author  MCD Application Team
-  * @version V1.8.0
-  * @date    09-November-2016
   * @brief   CMSIS Cortex-M4 Device System Source File for STM32F4xx devices.       
   ******************************************************************************  
   * @attention
   *
-  * <h2><center>&copy; COPYRIGHT 2016 STMicroelectronics</center></h2>
+  * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
   *
-  * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
+  * Redistribution and use in source and binary forms, with or without modification,
-  * You may not use this file except in compliance with the License.
+  * are permitted provided that the following conditions are met:
-  * You may obtain a copy of the License at:
+  *   1. Redistributions of source code must retain the above copyright notice,
+  *      this list of conditions and the following disclaimer.
+  *   2. Redistributions in binary form must reproduce the above copyright notice,
+  *      this list of conditions and the following disclaimer in the documentation
+  *      and/or other materials provided with the distribution.
+  *   3. Neither the name of STMicroelectronics nor the names of its contributors
+  *      may be used to endorse or promote products derived from this software
+  *      without specific prior written permission.
   *
-  *        http://www.st.com/software_license_agreement_liberty_v2
+  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  *
+  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * Unless required by applicable law or agreed to in writing, software 
+  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * distributed under the License is distributed on an "AS IS" BASIS, 
+  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * See the License for the specific language governing permissions and
+  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * limitations under the License.
+  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
   *
   ******************************************************************************  
   */ 
@@ -55,9 +63,18 @@
 /** @addtogroup STM32F4xx_System_Exported_types
   * @{
   */
-
+  /* This variable is updated in three ways:
+      1) by calling CMSIS function SystemCoreClockUpdate()
+      2) by calling HAL API function HAL_RCC_GetSysClockFreq()
+      3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency 
+         Note: If you use this function to configure the system clock; then there
+               is no need to call the 2 first functions listed above, since SystemCoreClock
+               variable is updated automatically.
+  */
 extern uint32_t SystemCoreClock;          /*!< System Clock Frequency (Core Clock) */
 
+extern const uint8_t  AHBPrescTable[16];    /*!< AHB prescalers table values */
+extern const uint8_t  APBPrescTable[8];     /*!< APB prescalers table values */
 
 /**
   * @}

platform/mcu/CMSIS/Device/ST/STM32F4xx/Source/system_stm32f4xx.c

@@ -116,6 +116,14 @@
 /************************* Miscellaneous Configuration ************************/
 #define VECT_TAB_OFFSET  0x00 /*!< Vector Table base offset field. 
                                    This value must be a multiple of 0x200. */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+  #define HSE_STARTUP_TIMEOUT    ((uint16_t)0x05000)   /*!< Time out for HSE start up */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+#if !defined  (HSI_VALUE)
+  #define HSI_VALUE    ((uint32_t)16000000) /*!< Value of the Internal oscillator in Hz*/
+#endif /* HSI_VALUE */
 /******************************************************************************/
 
 /************************* PLL Parameters *************************************/
@@ -132,9 +140,9 @@
 /******************************************************************************/
 
 
-  uint32_t SystemCoreClock = 168000000;
+uint32_t SystemCoreClock = 168000000;
 
-  __I uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
+const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
 
 
 static void SetSysClock(void);

platform/mcu/STM32F4xx/drivers/gpio.c

@@ -117,12 +117,12 @@ void gpio_setOutputSpeed(void *port, uint8_t pin, enum Speed spd)
 
 void gpio_setPin(void *port, uint8_t pin)
 {
-    ((GPIO_TypeDef *)(port))->BSRRL = (1 << pin);
+    ((GPIO_TypeDef *)(port))->BSRR = (1 << pin);
 }
 
 void gpio_clearPin(void *port, uint8_t pin)
 {
-    ((GPIO_TypeDef *)(port))->BSRRH = (1 << pin);
+    ((GPIO_TypeDef *)(port))->BSRR = (1 << (pin + 16));
 }
 
 void gpio_togglePin(void *port, uint8_t pin)