diff --git a/openrtx/include/interfaces/delays.h b/openrtx/include/interfaces/delays.h index 8206709a..a12e20f5 100644 --- a/openrtx/include/interfaces/delays.h +++ b/openrtx/include/interfaces/delays.h @@ -18,6 +18,10 @@ #ifndef DELAYS_H #define DELAYS_H +#ifdef __cplusplus +extern "C" { +#endif + /** * Function prototypes for microsecond and millisecond delays. * Their implementation is device-specific, thus it is placed inside the drivers @@ -36,4 +40,8 @@ void delayUs(unsigned int useconds); */ void delayMs(unsigned int mseconds); +#ifdef __cplusplus +} +#endif + #endif /* DELAYS_H */ diff --git a/openrtx/include/interfaces/display.h b/openrtx/include/interfaces/display.h index fe265099..416b6918 100644 --- a/openrtx/include/interfaces/display.h +++ b/openrtx/include/interfaces/display.h @@ -21,6 +21,10 @@ #include #include +#ifdef __cplusplus +extern "C" { +#endif + /** * Standard interface for all low-level display drivers. * @@ -104,4 +108,8 @@ bool display_renderingInProgress(); */ void display_setContrast(uint8_t contrast); +#ifdef __cplusplus +} +#endif + #endif /* DISPLAY_H */ diff --git a/openrtx/include/interfaces/gpio.h b/openrtx/include/interfaces/gpio.h index 2da7a7d5..2b851dab 100644 --- a/openrtx/include/interfaces/gpio.h +++ b/openrtx/include/interfaces/gpio.h @@ -20,6 +20,10 @@ #include +#ifdef __cplusplus +extern "C" { +#endif + /** * GPIO functional modes. * For more details see microcontroller's reference manual. @@ -106,4 +110,8 @@ void gpio_togglePin(void *port, uint8_t pin); */ uint8_t gpio_readPin(const void *port, uint8_t pin); +#ifdef __cplusplus +} +#endif + #endif /* GPIO_H */ diff --git a/openrtx/include/interfaces/gps.h b/openrtx/include/interfaces/gps.h index 9ccbabf5..7aa73f66 100644 --- a/openrtx/include/interfaces/gps.h +++ b/openrtx/include/interfaces/gps.h @@ -25,6 +25,10 @@ #include #include +#ifdef __cplusplus +extern "C" { +#endif + /** * Low-level driver for interfacing with radio's on-board GPS module. */ @@ -67,4 +71,8 @@ bool gps_detect(uint16_t timeout); */ int gps_getNmeaSentence(char *buf, const size_t maxLength); +#ifdef __cplusplus +} +#endif + #endif /* INTERFACES_GPS_H */ diff --git a/openrtx/include/interfaces/keyboard.h b/openrtx/include/interfaces/keyboard.h index 72ec26ab..a65864b9 100644 --- a/openrtx/include/interfaces/keyboard.h +++ b/openrtx/include/interfaces/keyboard.h @@ -22,7 +22,7 @@ #include #include -#include +#include /** * The following enum provides a set of flags to be used to check which buttons @@ -69,7 +69,7 @@ static const uint8_t kbd_num_keys = 29; /** * Time interval in ticks after which a keypress is considered a long-press */ -static const uint16_t kbd_long_interval = OS_CFG_TICK_RATE_HZ * 0.7; +static const uint16_t kbd_long_interval = TICK_FREQ * 0.7; /** * Mask for the numeric keys in a key map @@ -97,7 +97,7 @@ typedef union /** * We encode the status of all the keys with a uint32_t value - * To check which buttons are pressed one can bit-mask the + * To check which buttons are pressed one can bit-mask the * keys value with one of the enum values defined in key. * Example: * keyboard_t keys = kbd_getKeys(); @@ -119,7 +119,7 @@ void kbd_terminate(); /** * When called, this function takes a snapshot of the current configuration of * all the keyboard buttons and returns it as a 32-bit variable. - * + * * @return an uint32_t representing the current keyboard configuration. */ keyboard_t kbd_getKeys(); diff --git a/openrtx/include/interfaces/platform.h b/openrtx/include/interfaces/platform.h index f018ee3e..b67bcfd1 100644 --- a/openrtx/include/interfaces/platform.h +++ b/openrtx/include/interfaces/platform.h @@ -23,6 +23,10 @@ #include #include +#ifdef __cplusplus +extern "C" { +#endif + /** * Standard interface for device-specific hardware. * This interface handles: @@ -152,4 +156,8 @@ const void *platform_getCalibrationData(); */ const hwInfo_t *platform_getHwInfo(); +#ifdef __cplusplus +} +#endif + #endif /* PLATFORM_H */ diff --git a/openrtx/include/interfaces/radio.h b/openrtx/include/interfaces/radio.h index 2f661d68..e730e7f2 100644 --- a/openrtx/include/interfaces/radio.h +++ b/openrtx/include/interfaces/radio.h @@ -25,6 +25,10 @@ #include #include +#ifdef __cplusplus +extern "C" { +#endif + /** * This file provides a common interface for the platform-dependent low-level * rtx driver. Top level application code normally does not have to call directly @@ -92,4 +96,8 @@ void radio_updateCalibrationParams(const rtxStatus_t *rtxCfg); */ float radio_getRssi(const freq_t rxFreq); +#ifdef __cplusplus +} +#endif + #endif /* RADIO_H */ diff --git a/platform/drivers/GPS/GPS_MDx.c b/platform/drivers/GPS/GPS_MDx.cpp similarity index 80% rename from platform/drivers/GPS/GPS_MDx.c rename to platform/drivers/GPS/GPS_MDx.cpp index 1d1a7f9c..a98f1b5e 100644 --- a/platform/drivers/GPS/GPS_MDx.c +++ b/platform/drivers/GPS/GPS_MDx.cpp @@ -23,15 +23,18 @@ #include #include #include -#include +#include +#include -int8_t detectStatus = -1; -size_t bufPos = 0; -size_t maxPos = 0; -char *dataBuf; -bool receiving = false; +int8_t detectStatus = -1; +size_t bufPos = 0; +size_t maxPos = 0; +char *dataBuf; +bool receiving = false; +uint8_t status = 0; -OS_FLAG_GRP sentenceReady; +using namespace miosix; +Thread *gpsWaiting = 0; #ifdef PLATFORM_MD3x0 #define PORT USART3 @@ -39,11 +42,8 @@ OS_FLAG_GRP sentenceReady; #define PORT USART1 #endif -#ifdef PLATFORM_MD3x0 -void __attribute__((used)) USART3_IRQHandler() -#else -void __attribute__((used)) USART1_IRQHandler() -#endif + +void __attribute__((used)) GpsUsartImpl() { if(PORT->SR & USART_SR_RXNE) { @@ -74,15 +74,30 @@ void __attribute__((used)) USART1_IRQHandler() if((receiving == false) && (bufPos != 0)) { - uint8_t flag = (bufPos < maxPos) ? 0x01 : 0x02; - OS_ERR err; - OSFlagPost(&sentenceReady, flag, OS_OPT_POST_FLAG_SET, &err); + status = (bufPos < maxPos) ? 0x01 : 0x02; + + if(gpsWaiting == 0) return; + gpsWaiting->IRQwakeup(); + if(gpsWaiting->IRQgetPriority()>Thread::IRQgetCurrentThread()->IRQgetPriority()) + Scheduler::IRQfindNextThread(); + gpsWaiting = 0; } } PORT->SR = 0; } +#ifdef PLATFORM_MD3x0 +void __attribute__((naked)) USART3_IRQHandler() +#else +void __attribute__((naked)) USART1_IRQHandler() +#endif +{ + saveContext(); + asm volatile("bl _Z12GpsUsartImplv"); + restoreContext(); +} + void gps_init(const uint16_t baud) { @@ -111,15 +126,10 @@ void gps_init(const uint16_t baud) NVIC_ClearPendingIRQ(USART1_IRQn); NVIC_SetPriority(USART1_IRQn, 14); #endif - - OS_ERR err; - OSFlagCreate(&sentenceReady, "", 0, &err); } void gps_terminate() { - OS_ERR err; - OSFlagDel(&sentenceReady, OS_OPT_DEL_NO_PEND, &err); gps_disable(); #ifdef PLATFORM_MD3x0 @@ -192,11 +202,21 @@ int gps_getNmeaSentence(char *buf, const size_t maxLength) NVIC_EnableIRQ(USART1_IRQn); #endif - OS_ERR err; - OS_FLAGS status = OSFlagPend(&sentenceReady, 0x03, 0, - OS_OPT_PEND_FLAG_SET_ANY | - OS_OPT_PEND_FLAG_CONSUME | - OS_OPT_PEND_BLOCKING, NULL, &err); + /* + * Put the calling thread in waiting status until a complete sentence is ready. + */ + { + FastInterruptDisableLock dLock; + gpsWaiting = Thread::IRQgetCurrentThread(); + do + { + Thread::IRQwait(); + { + FastInterruptEnableLock eLock(dLock); + Thread::yield(); + } + } while(gpsWaiting); + } #ifdef PLATFORM_MD3x0 NVIC_DisableIRQ(USART3_IRQn); diff --git a/platform/drivers/baseband/HR_C5000.c b/platform/drivers/baseband/HR_C5000.c index ccf90e22..fdb41a09 100644 --- a/platform/drivers/baseband/HR_C5000.c +++ b/platform/drivers/baseband/HR_C5000.c @@ -22,7 +22,6 @@ #include #include #include -#include #include "HR_C5000.h" const uint8_t initSeq1[] = {0x00, 0x00, 0xFF, 0xB0, 0x00, 0x00, 0x00, 0x00}; @@ -108,8 +107,8 @@ void C5000_init() _writeReg(0x00, 0x0A, 0x80); // Internal clock connected to crystal _writeReg(0x00, 0x0B, 0x28); // PLL M register (multiplier) _writeReg(0x00, 0x0C, 0x33); // PLL input and output dividers - OS_ERR err; - OSTimeDly(1, OS_OPT_TIME_DLY, &err); + + delayMs(1); _writeReg(0x00, 0x0A, 0x00); // Internal clock connected to PLL _writeReg(0x00, 0xBA, 0x22); // Built-in codec clock freq. (HR_C6000) _writeReg(0x00, 0xBB, 0x11); // Output clock operating freq. (HR_C6000) @@ -178,8 +177,7 @@ void C5000_dmrMode() _sendSequence(initSeq2, sizeof(initSeq2)); _writeReg(0x00, 0x00, 0x28); - OS_ERR err; - OSTimeDly(1, OS_OPT_TIME_DLY, &err); + delayMs(1); _writeReg(0x00, 0x14, 0x59); _writeReg(0x00, 0x15, 0xF5); diff --git a/platform/drivers/baseband/HR_C6000.c b/platform/drivers/baseband/HR_C6000.c index a6cd7890..81c0ecfe 100644 --- a/platform/drivers/baseband/HR_C6000.c +++ b/platform/drivers/baseband/HR_C6000.c @@ -24,7 +24,6 @@ #include #include #include -#include #include #include @@ -123,19 +122,19 @@ void C6000_init() _sendSequence(initSeq4, sizeof(initSeq4)); _sendSequence(initSeq5, sizeof(initSeq5)); _sendSequence(initSeq6, sizeof(initSeq6)); - + _writeReg(0x04, 0x00, 0x00); //Clear all Reset Bits which forces a reset of all internal systems _writeReg(0x04, 0x10, 0x6E); //Set DMR,Tier2,Timeslot Mode, Layer 2, Repeater, Aligned, Slot1 - _writeReg(0x04, 0x11, 0x80); //Set LocalChanMode to Default Value + _writeReg(0x04, 0x11, 0x80); //Set LocalChanMode to Default Value _writeReg(0x04, 0x13, 0x00); //Zero Cend_Band Timing advance _writeReg(0x04, 0x1F, 0x10); //Set LocalEMB DMR Colour code in upper 4 bits - defaulted to 1, and is updated elsewhere in the code _writeReg(0x04, 0x20, 0x00); //Set LocalAccessPolicy to Impolite - _writeReg(0x04, 0x21, 0xA0); //Set LocalAccessPolicy1 to Polite to Color Code (unsure why there are two registers for this) + _writeReg(0x04, 0x21, 0xA0); //Set LocalAccessPolicy1 to Polite to Color Code (unsure why there are two registers for this) _writeReg(0x04, 0x22, 0x26); //Start Vocoder Decode, I2S mode _writeReg(0x04, 0x22, 0x86); //Start Vocoder Encode, I2S mode - _writeReg(0x04, 0x25, 0x0E); //Undocumented Register - _writeReg(0x04, 0x26, 0x7D); //Undocumented Register - _writeReg(0x04, 0x27, 0x40); //Undocumented Register + _writeReg(0x04, 0x25, 0x0E); //Undocumented Register + _writeReg(0x04, 0x26, 0x7D); //Undocumented Register + _writeReg(0x04, 0x27, 0x40); //Undocumented Register _writeReg(0x04, 0x28, 0x7D); //Undocumented Register _writeReg(0x04, 0x29, 0x40); //Undocumented Register _writeReg(0x04, 0x2A, 0x0B); //Set spi_clk_cnt to default value @@ -146,7 +145,7 @@ void C6000_init() _writeReg(0x04, 0x2F, 0x0B); //Set I2S Clock Frequency _writeReg(0x04, 0x32, 0x02); //Set LRCK_CNT_H CODEC Operating Frequency to default value _writeReg(0x04, 0x33, 0xFF); //Set LRCK_CNT_L CODEC Operating Frequency to default value - _writeReg(0x04, 0x34, 0xF0); //Set FM Filters on and bandwidth to 12.5Khz + _writeReg(0x04, 0x34, 0xF0); //Set FM Filters on and bandwidth to 12.5Khz _writeReg(0x04, 0x35, 0x28); //Set FM Modulation Coefficient _writeReg(0x04, 0x3E, 0x28); //Set FM Modulation Offset _writeReg(0x04, 0x3F, 0x10); //Set FM Modulation Limiter @@ -163,7 +162,7 @@ void C6000_init() _writeReg(0x04, 0x01, 0x70); //set 2 point Mod, swap receive I and Q, receive mode IF (?) (Presumably changed elsewhere) _writeReg(0x04, 0x03, 0x00); //zero Receive I Offset _writeReg(0x04, 0x05, 0x00); //Zero Receive Q Offset - _writeReg(0x04, 0x12, 0x15); //Set rf_pre_on Receive to transmit switching advance + _writeReg(0x04, 0x12, 0x15); //Set rf_pre_on Receive to transmit switching advance _writeReg(0x04, 0xA1, 0x80); //According to Datasheet this register is for FM Modulation Setting (?) _writeReg(0x04, 0xC0, 0x0A); //Set RF Signal Advance to 1ms (10x100us) _writeReg(0x04, 0x06, 0x21); //Use SPI vocoder under MCU control @@ -171,13 +170,13 @@ void C6000_init() _writeReg(0x04, 0x08, 0xB8); //Set IF Frequency M to default 450KHz _writeReg(0x04, 0x09, 0x00); //Set IF Frequency L to default 450KHz _writeReg(0x04, 0x0D, 0x10); //Set Voice Superframe timeout value - _writeReg(0x04, 0x0E, 0x8E); //Register Documented as Reserved + _writeReg(0x04, 0x0E, 0x8E); //Register Documented as Reserved _writeReg(0x04, 0x0F, 0xB8); //FSK Error Count _writeReg(0x04, 0xC2, 0x00); //Disable Mic Gain AGC _writeReg(0x04, 0xE0, 0x8B); //CODEC under MCU Control, LineOut2 Enabled, Mic_p Enabled, I2S Slave Mode _writeReg(0x04, 0xE1, 0x0F); //Undocumented Register (Probably associated with CODEC) _writeReg(0x04, 0xE2, 0x06); //CODEC Anti Pop Enabled, DAC Output Enabled - _writeReg(0x04, 0xE3, 0x52); //CODEC Default Settings + _writeReg(0x04, 0xE3, 0x52); //CODEC Default Settings _writeReg(0x04, 0xE4, 0x4A); //CODEC LineOut Gain 2dB, Mic Stage 1 Gain 0dB, Mic Stage 2 Gain 30dB _writeReg(0x04, 0xE5, 0x1A); //CODEC Default Setting @@ -215,10 +214,10 @@ void C6000_init() _sendSequence(initSeq1, sizeof(initSeq1)); _writeReg(0x04, 0x10, 0x6E); //Set DMR, Tier2, Timeslot mode, Layer2, Repeater, Aligned, Slot 1 _writeReg(0x04, 0x1F, 0x10); // Set Local EMB. DMR Colour code in upper 4 bits - defaulted to 1, and is updated elsewhere in the code - _writeReg(0x04, 0x26, 0x7D); //Undocumented Register - _writeReg(0x04, 0x27, 0x40); //Undocumented Register - _writeReg(0x04, 0x28, 0x7D); //Undocumented Register - _writeReg(0x04, 0x29, 0x40); //Undocumented Register + _writeReg(0x04, 0x26, 0x7D); //Undocumented Register + _writeReg(0x04, 0x27, 0x40); //Undocumented Register + _writeReg(0x04, 0x28, 0x7D); //Undocumented Register + _writeReg(0x04, 0x29, 0x40); //Undocumented Register _writeReg(0x04, 0x2A, 0x0B); //Set SPI Clock to default value _writeReg(0x04, 0x2B, 0x0B); //According to Datasheet this is a Read only register For FM Squelch _writeReg(0x04, 0x2C, 0x17); //According to Datasheet this is a Read only register For FM Squelch @@ -237,7 +236,7 @@ void C6000_init() _writeReg(0x04, 0x08, 0xB8); //Set IF Frequency M to default 450KHz _writeReg(0x04, 0x09, 0x00); //Set IF Frequency l to default 450KHz _writeReg(0x04, 0x0D, 0x10); //Set Voice Superframe timeout value - _writeReg(0x04, 0x0E, 0x8E); //Register Documented as Reserved + _writeReg(0x04, 0x0E, 0x8E); //Register Documented as Reserved _writeReg(0x04, 0x0F, 0xB8); //FSK Error Count _writeReg(0x04, 0xC2, 0x00); //Disable Mic Gain AGC _writeReg(0x04, 0xE0, 0x8B); //CODEC under MCU Control, LineOut2 Enabled, Mic_p Enabled, I2S Slave Mode @@ -257,7 +256,7 @@ void C6000_init() _writeReg(0x04, 0x10, 0x6E); //Set DMR, Tier2, Timeslot mode, Layer2, Repeater, Aligned, Slot 1 _writeReg(0x04, 0x00, 0x3F); //Reset DMR Protocol and Physical layer modules. _writeReg(0x04, 0xE4, 0xCB); //CODEC LineOut Gain 6dB, Mic Stage 1 Gain 0dB, Mic Stage 2 Gain default is 11 = 33dB - + _writeReg(0x04, 0x06, 0x23); //*/ diff --git a/platform/drivers/display/HX8353_MDx.c b/platform/drivers/display/HX8353_MDx.cpp similarity index 93% rename from platform/drivers/display/HX8353_MDx.c rename to platform/drivers/display/HX8353_MDx.cpp index d71175a2..bed62c4e 100644 --- a/platform/drivers/display/HX8353_MDx.c +++ b/platform/drivers/display/HX8353_MDx.cpp @@ -21,7 +21,8 @@ #include #include #include -#include +#include +#include /** * LCD command set, basic and extended @@ -85,21 +86,31 @@ #define LCD_FSMC_ADDR_DATA 0x60040000 /* - * LCD framebuffer, statically allocated. + * LCD framebuffer, dynamically allocated. * Pixel format is RGB565, 16 bit per pixel */ -static uint16_t frameBuffer[SCREEN_WIDTH * SCREEN_HEIGHT]; -OS_FLAG_GRP renderCompleted; +static uint16_t *frameBuffer; -void __attribute__((used)) DMA2_Stream7_IRQHandler() +using namespace miosix; +Thread *lcdWaiting = 0; + +void __attribute__((used)) DmaImpl() { - OS_ERR err; - - OSIntEnter(); DMA2->HIFCR |= DMA_HIFCR_CTCIF7 | DMA_HIFCR_CTEIF7; /* Clear flags */ gpio_setPin(LCD_CS); - OSFlagPost(&renderCompleted, 0x01, OS_OPT_POST_FLAG_SET, &err); - OSIntExit(); + + if(lcdWaiting == 0) return; + lcdWaiting->IRQwakeup(); + if(lcdWaiting->IRQgetPriority()>Thread::IRQgetCurrentThread()->IRQgetPriority()) + Scheduler::IRQfindNextThread(); + lcdWaiting = 0; +} + +void __attribute__((naked)) DMA2_Stream7_IRQHandler() +{ + saveContext(); + asm volatile("bl _Z7DmaImplv"); + restoreContext(); } static inline __attribute__((__always_inline__)) void writeCmd(uint8_t cmd) @@ -114,11 +125,13 @@ static inline __attribute__((__always_inline__)) void writeData(uint8_t val) void display_init() { - /* Create flag for render completion wait */ - OS_ERR err; - OSFlagCreate(&renderCompleted, "", 0, &err); - /* Clear framebuffer, setting all pixels to 0xFFFF makes the screen white */ + /* Allocate and clear framebuffer, setting all pixels to 0xFFFF makes the + * screen white. + * + * TODO: handle the case when memory allocation fails! + */ + frameBuffer = ((uint16_t *) malloc(SCREEN_WIDTH * SCREEN_HEIGHT * sizeof(uint16_t))); memset(frameBuffer, 0xFF, SCREEN_WIDTH * SCREEN_HEIGHT * sizeof(uint16_t)); /* @@ -421,8 +434,7 @@ void display_init() void display_terminate() { - OS_ERR err; - OSFlagDel(&renderCompleted, OS_OPT_DEL_NO_PEND, &err); + free(frameBuffer); /* Shut off FSMC and deallocate framebuffer */ RCC->AHB3ENR &= ~RCC_AHB3ENR_FSMCEN; @@ -489,10 +501,21 @@ void display_renderRows(uint8_t startRow, uint8_t endRow) | DMA_SxCR_TEIE /* Transfer error interrupt */ | DMA_SxCR_EN; /* Start transfer */ - OS_ERR err; - OSFlagPend(&renderCompleted, 0x01, 0, OS_OPT_PEND_FLAG_SET_ANY | - OS_OPT_PEND_FLAG_CONSUME | - OS_OPT_PEND_BLOCKING, NULL, &err); + /* + * Put the calling thread in waiting status until render completes. + */ + { + FastInterruptDisableLock dLock; + lcdWaiting = Thread::IRQgetCurrentThread(); + do + { + Thread::IRQwait(); + { + FastInterruptEnableLock eLock(dLock); + Thread::yield(); + } + } while(lcdWaiting); + } } void display_render() diff --git a/platform/drivers/tones/toneGenerator_MDx.c b/platform/drivers/tones/toneGenerator_MDx.c index be8695d5..e8d5ea5a 100644 --- a/platform/drivers/tones/toneGenerator_MDx.c +++ b/platform/drivers/tones/toneGenerator_MDx.c @@ -21,7 +21,6 @@ #include "toneGenerator_MDx.h" #include #include -#include /* * Sine table for PWM-based sinewave generation, containing 256 samples over one @@ -61,9 +60,9 @@ uint32_t beepTableIndex = 0; /* Current sine table index for "beep" generator */ uint32_t beepTableIncr = 0; /* "beep" sine table index increment per tick */ uint32_t beepTimerCount = 0; /* Downcounter for timed "beep" */ -void __attribute__((used)) TIM3_IRQHandler() +/* Name-mangled function name, for C++ compatibility */ +void __attribute__((used)) _Z15TIM3_IRQHandlerv() { - OSIntEnter(); toneTableIndex += toneTableIncr; beepTableIndex += beepTableIncr; @@ -85,7 +84,6 @@ void __attribute__((used)) TIM3_IRQHandler() { TIM3->CR1 &= ~TIM_CR1_CEN; } - OSIntExit(); } void toneGen_init() diff --git a/platform/mcu/STM32F4xx/drivers/rtc.c b/platform/mcu/STM32F4xx/drivers/rtc.c index 03bd3e09..553c515a 100644 --- a/platform/mcu/STM32F4xx/drivers/rtc.c +++ b/platform/mcu/STM32F4xx/drivers/rtc.c @@ -17,9 +17,8 @@ * along with this program; if not, see * ***************************************************************************/ -#include #include -#include "stm32f4xx.h" +#include void rtc_init() { @@ -69,13 +68,11 @@ void rtc_setTime(curTime_t t) time &= RTC_TR_HT | RTC_TR_HU | RTC_TR_MNT | RTC_TR_MNU | RTC_TR_ST | RTC_TR_SU; /* Enter initialisation mode and update registers */ -// CPU_CRITICAL_ENTER(); RTC->ISR |= RTC_ISR_INIT; while((RTC->ISR & RTC_ISR_INITF) == 0) ; RTC->TR = time; RTC->DR = date; RTC->ISR &= ~RTC_ISR_INIT; -// CPU_CRITICAL_EXIT(); } void rtc_setHour(uint8_t hours, uint8_t minutes, uint8_t seconds) @@ -122,17 +119,13 @@ void rtc_dstSet() { /* If BKP bit is set, DST has been already set */ if(RTC->CR & RTC_CR_BCK) return; -// CPU_CRITICAL_ENTER(); RTC->CR |= RTC_CR_BCK | RTC_CR_ADD1H; -// CPU_CRITICAL_EXIT(); } void rtc_dstClear() { /* If BKP bit is cleared, DST has been already removed */ if((RTC->CR & RTC_CR_BCK) == 0) return; -// CPU_CRITICAL_ENTER(); RTC->CR &= ~RTC_CR_BCK; RTC->CR |= RTC_CR_SUB1H; -// CPU_CRITICAL_EXIT(); } diff --git a/tests/platform/boot_test.c b/tests/platform/boot_test.c index 6647011c..9beb354a 100644 --- a/tests/platform/boot_test.c +++ b/tests/platform/boot_test.c @@ -18,9 +18,9 @@ * along with this program; if not, see * ***************************************************************************/ -#include #include #include +#include int main() { @@ -28,12 +28,10 @@ int main() while(1) { - OS_ERR e; - platform_ledOn(GREEN); - OSTimeDlyHMSM(0u, 0u, 1u, 0u, OS_OPT_TIME_HMSM_STRICT, &e); + delayMs(1000); platform_ledOff(GREEN); - OSTimeDlyHMSM(0u, 0u, 1u, 0u, OS_OPT_TIME_HMSM_STRICT, &e); + delayMs(1000); } return 0;