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On MDx targets made the ADC DMA trasfer priority higher than the DMA framebuffer one to avoid ADC overruns due to the ADC DMA transfer being suspended by the framebuffer ones

This commit is contained in:
Silvano Seva 2020-12-19 21:57:43 +01:00
parent 1f6bfa4cff
commit 85a41a5ca7
2 changed files with 5 additions and 5 deletions
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9
platform/drivers/ADC/ADC1_MDx.c
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@ -100,10 +100,11 @@ void adc1_init()
DMA2_Stream0->PAR = ((uint32_t) &(ADC1->DR)); DMA2_Stream0->PAR = ((uint32_t) &(ADC1->DR));
DMA2_Stream0->M0AR = ((uint32_t) &sampleRingBuf); DMA2_Stream0->M0AR = ((uint32_t) &sampleRingBuf);
DMA2_Stream0->NDTR = 16; DMA2_Stream0->NDTR = 16;
DMA2_Stream0->CR = DMA_SxCR_MSIZE_0 DMA2_Stream0->CR = DMA_SxCR_MSIZE_0 /* Memory size: 16 bit */
| DMA_SxCR_PSIZE_0 | DMA_SxCR_PSIZE_0 /* Peripheral size: 16 bit */
| DMA_SxCR_MINC | DMA_SxCR_PL_0 /* Medium priority */
| DMA_SxCR_CIRC | DMA_SxCR_MINC /* Increment memory */
| DMA_SxCR_CIRC /* Circular mode */
| DMA_SxCR_EN; | DMA_SxCR_EN;
/* Finally, start conversion */ /* Finally, start conversion */

1
platform/drivers/display/HX83XX_MDx.c
View File

@ -388,7 +388,6 @@ void display_renderRows(uint8_t startRow, uint8_t endRow)
* sizeof(uint16_t))); * sizeof(uint16_t)));
DMA2_Stream7->M0AR = LCD_FSMC_ADDR_DATA; DMA2_Stream7->M0AR = LCD_FSMC_ADDR_DATA;
DMA2_Stream7->CR = DMA_SxCR_CHSEL /* Channel 7 */ DMA2_Stream7->CR = DMA_SxCR_CHSEL /* Channel 7 */
| DMA_SxCR_PL_0 /* Medium priority */
| DMA_SxCR_PINC /* Increment source pointer */ | DMA_SxCR_PINC /* Increment source pointer */
| DMA_SxCR_DIR_1 /* Memory to memory */ | DMA_SxCR_DIR_1 /* Memory to memory */
| DMA_SxCR_TCIE /* Transfer complete interrupt */ | DMA_SxCR_TCIE /* Transfer complete interrupt */