fleg
/
OpenRTX
1
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

stm32h7xx: rcc: configure USART1/USART6 kernel clock source to pclk2

This commit is contained in:
JKI757 2025-08-18 16:18:39 -04:00 committed by Silvano Seva
parent ac04f247b0
commit e738e18d16
1 changed files with 4 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
platform/mcu/STM32H7xx/drivers/rcc.cpp
View File

@ -96,6 +96,10 @@ void startPll()
| RCC_PLLCFGR_DIVP2EN;
RCC->CR |= RCC_CR_PLL2ON; // Start PLL2
while((RCC->CR & RCC_CR_PLL2RDY)==0) ; // Wait until ready
// Configure USART6 kernel clock source to use PCLK2
// USART16SEL field is bits [5:3]: 000 = pclk2
RCC->D2CCIP2R &= ~RCC_D2CCIP2R_USART16SEL;
}
uint32_t getBusClock(const uint8_t bus)