stm32h7xx: rcc: configure USART1/USART6 kernel clock source to pclk2
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@ -96,6 +96,10 @@ void startPll()
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| RCC_PLLCFGR_DIVP2EN;
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| RCC_PLLCFGR_DIVP2EN;
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RCC->CR |= RCC_CR_PLL2ON; // Start PLL2
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RCC->CR |= RCC_CR_PLL2ON; // Start PLL2
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while((RCC->CR & RCC_CR_PLL2RDY)==0) ; // Wait until ready
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while((RCC->CR & RCC_CR_PLL2RDY)==0) ; // Wait until ready
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// Configure USART6 kernel clock source to use PCLK2
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// USART16SEL field is bits [5:3]: 000 = pclk2
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RCC->D2CCIP2R &= ~RCC_D2CCIP2R_USART16SEL;
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}
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}
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uint32_t getBusClock(const uint8_t bus)
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uint32_t getBusClock(const uint8_t bus)
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