130 lines
3.9 KiB
C
130 lines
3.9 KiB
C
/***************************************************************************
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* Copyright (C) 2020 - 2023 by Silvano Seva IU2KWO *
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* and Niccolò Izzo IU2KIN *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 3 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, see <http://www.gnu.org/licenses/> *
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***************************************************************************/
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#include <stm32f4xx.h>
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#include <pthread.h>
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#include <errno.h>
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#include "adc_stm32.h"
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int adcStm32_init(const struct Adc *adc)
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{
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switch((uint32_t) adc->priv)
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{
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case ADC1_BASE:
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RCC->APB2ENR |= RCC_APB2ENR_ADC1EN;
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__DSB();
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break;
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case ADC2_BASE:
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RCC->APB2ENR |= RCC_APB2ENR_ADC2EN;
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__DSB();
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break;
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case ADC3_BASE:
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RCC->APB2ENR |= RCC_APB2ENR_ADC3EN;
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__DSB();
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break;
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default:
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return -EINVAL;
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break;
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}
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ADC_TypeDef *pAdc = ((ADC_TypeDef *) adc->priv);
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/*
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* ADC clock is APB2 frequency divided by 8, giving 10.5MHz.
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* We set the sample time of each channel to 84 ADC cycles and we have that
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* a conversion takes 12 cycles: total conversion time is then of ~9us.
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*/
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ADC->CCR |= ADC_CCR_ADCPRE;
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pAdc->SMPR2 = 0x4924924;
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pAdc->SMPR1 = 0x24924924;
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/*
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* Convert one channel, no overrun interrupt, 12-bit resolution,
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* no analog watchdog, discontinuous mode, no end of conversion interrupts,
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* turn on ADC.
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*/
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pAdc->SQR1 = 0;
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pAdc->CR2 = ADC_CR2_ADON;
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if(adc->mutex != NULL)
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pthread_mutex_init((pthread_mutex_t *) adc->mutex, NULL);
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return 0;
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}
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void adcStm32_terminate(const struct Adc *adc)
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{
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/* A conversion may be in progress, wait until it finishes */
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if(adc->mutex != NULL)
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pthread_mutex_lock((pthread_mutex_t *) adc->mutex);
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((ADC_TypeDef *) adc->priv)->CR2 = 0;
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switch((uint32_t) adc->priv)
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{
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case ADC1_BASE:
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RCC->APB2ENR &= ~RCC_APB2ENR_ADC1EN;
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__DSB();
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break;
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case ADC2_BASE:
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RCC->APB2ENR &= ~RCC_APB2ENR_ADC2EN;
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__DSB();
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break;
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case ADC3_BASE:
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RCC->APB2ENR &= ~RCC_APB2ENR_ADC3EN;
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__DSB();
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break;
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}
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if(adc->mutex != NULL)
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pthread_mutex_destroy((pthread_mutex_t *) adc->mutex);
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}
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uint16_t adcStm32_sample(const struct Adc *adc, const uint32_t channel)
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{
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if(channel > 19)
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return 0;
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ADC_TypeDef *pAdc = ((ADC_TypeDef *) adc->priv);
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/* Channel 18 is Vbat, enable it if requested */
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if(channel == 18)
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ADC123_COMMON->CCR |= ADC_CCR_VBATE;
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pAdc->SQR3 = channel;
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pAdc->CR2 |= ADC_CR2_SWSTART;
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while((pAdc->SR & ADC_SR_EOC) == 0) ;
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uint16_t value = pAdc->DR;
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/* Disconnect Vbat channel. Vbat has an internal x2 voltage divider */
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if(channel == 18)
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{
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value *= 2;
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ADC123_COMMON->CCR &= ~ADC_CCR_VBATE;
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}
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return value;
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}
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