115 lines
3.8 KiB
C
115 lines
3.8 KiB
C
/***************************************************************************
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* Copyright (C) 2024 - 2025 by Silvano Seva IU2KWO *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 3 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, see <http://www.gnu.org/licenses/> *
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***************************************************************************/
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#include <interfaces/delays.h>
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#include <peripherals/gpio.h>
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#include <string.h>
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#include <errno.h>
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#include "gpio_shiftReg.h"
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void gpioShiftReg_init(const struct gpioDev *dev)
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{
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const struct gpioShiftRegPriv *cfg = (const struct gpioShiftRegPriv *) dev->priv;
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const size_t nBytes = (cfg->numOutputs + 8 - 1) / 8;
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// Setup strobe line
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gpioDev_setMode(cfg->strobe.port, cfg->strobe.pin, OUTPUT);
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gpioDev_clear(cfg->strobe.port, cfg->strobe.pin);
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// Clear all outputs
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memset(cfg->outData, 0x00, nBytes);
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spi_send(cfg->spi, cfg->outData, nBytes);
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gpioDev_set(cfg->strobe.port, cfg->strobe.pin);
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}
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void gpioShiftReg_terminate(const struct gpioDev *dev)
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{
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(void) dev;
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}
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static int gpioShiftReg_mode(const struct gpioDev *dev, const uint8_t pin,
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const uint16_t mode)
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{
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(void) dev;
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(void) pin;
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(void) mode;
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return -ENOTSUP;
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}
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static void gpioShiftReg_set(const struct gpioDev *dev, const uint8_t pin)
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{
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const struct gpioShiftRegPriv *cfg = (const struct gpioShiftRegPriv *) dev->priv;
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const size_t nBytes = (cfg->numOutputs + 8 - 1) / 8;
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const size_t byte = (cfg->numOutputs - 1 - pin) / 8;
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const size_t bit = pin % 8;
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if(pin > cfg->numOutputs)
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return;
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__disable_irq();
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cfg->outData[byte] |= (1 << bit);
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gpioDev_clear(cfg->strobe.port, cfg->strobe.pin);
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spi_send(cfg->spi, cfg->outData, nBytes);
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gpioDev_set(cfg->strobe.port, cfg->strobe.pin);
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__enable_irq();
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}
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static void gpioShiftReg_clear(const struct gpioDev *dev, const uint8_t pin)
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{
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const struct gpioShiftRegPriv *cfg = (const struct gpioShiftRegPriv *) dev->priv;
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const size_t nBytes = (cfg->numOutputs + 8 - 1) / 8;
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const size_t byte = (cfg->numOutputs - 1 - pin) / 8;
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const size_t bit = pin % 8;
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if(pin > cfg->numOutputs)
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return;
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__disable_irq();
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cfg->outData[byte] &= ~(1 << bit);
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gpioDev_clear(cfg->strobe.port, cfg->strobe.pin);
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spi_send(cfg->spi, cfg->outData, nBytes);
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gpioDev_set(cfg->strobe.port, cfg->strobe.pin);
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__enable_irq();
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}
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static bool gpioShiftReg_read(const struct gpioDev *dev, const uint8_t pin)
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{
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const struct gpioShiftRegPriv *cfg = (const struct gpioShiftRegPriv *) dev->priv;
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const size_t byte = (cfg->numOutputs - 1 - pin) / 8;
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const size_t bit = pin % 8;
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if(pin > cfg->numOutputs)
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return false;
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return ((cfg->outData[byte] & (1 << bit)) != 0) ? true : false;
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}
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const struct gpioApi gpioShiftReg_ops =
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{
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.mode = &gpioShiftReg_mode,
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.set = &gpioShiftReg_set,
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.clear = &gpioShiftReg_clear,
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.read = &gpioShiftReg_read
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};
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