149 lines
5.7 KiB
ArmAsm
149 lines
5.7 KiB
ArmAsm
@********************************************************************************************************
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@ uC/CPU
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@ CPU CONFIGURATION & PORT LAYER
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@
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@ Copyright 2004-2020 Silicon Laboratories Inc. www.silabs.com
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@
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@ SPDX-License-Identifier: APACHE-2.0
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@
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@ This software is subject to an open source license and is distributed by
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@ Silicon Laboratories Inc. pursuant to the terms of the Apache License,
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@ Version 2.0 available at www.apache.org/licenses/LICENSE-2.0.
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@
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@********************************************************************************************************
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@********************************************************************************************************
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@
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@ CPU PORT FILE
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@
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@ ARMv6-M
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@ GNU C Compiler
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@
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@ Filename : cpu_a.s
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@ Version : v1.32.00
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@********************************************************************************************************
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@ Note(s) : This port supports the ARM Cortex-M0, and Cortex-M0+ architectures.
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@********************************************************************************************************
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@********************************************************************************************************
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@ PUBLIC FUNCTIONS
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@********************************************************************************************************
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.global CPU_IntDis
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.global CPU_IntEn
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.global CPU_SR_Save
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.global CPU_SR_Restore
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.global CPU_WaitForInt
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.global CPU_WaitForExcept
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@********************************************************************************************************
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@ CODE GENERATION DIRECTIVES
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@********************************************************************************************************
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.text
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.align 2
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.thumb
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.syntax unified
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@********************************************************************************************************
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@ DISABLE and ENABLE INTERRUPTS
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@
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@ Description : Disable/Enable interrupts.
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@
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@ Prototypes : void CPU_IntDis(void);
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@ void CPU_IntEn (void);
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@********************************************************************************************************
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.thumb_func
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CPU_IntDis:
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CPSID I
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BX LR
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.thumb_func
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CPU_IntEn:
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CPSIE I
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BX LR
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@********************************************************************************************************
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@ CRITICAL SECTION FUNCTIONS
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@
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@ Description : Disable/Enable interrupts by preserving the state of interrupts. Generally speaking, the
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@ state of the interrupt disable flag is stored in the local variable 'cpu_sr' & interrupts
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@ are then disabled ('cpu_sr' is allocated in all functions that need to disable interrupts).
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@ The previous interrupt state is restored by copying 'cpu_sr' into the CPU's status register.
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@
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@ Prototypes : CPU_SR CPU_SR_Save (void);
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@ void CPU_SR_Restore(CPU_SR cpu_sr);
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@
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@ Note(s) : (1) These functions are used in general like this :
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@
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@ void Task (void *p_arg)
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@ {
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@ CPU_SR_ALLOC(); /* Allocate storage for CPU status register */
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@ :
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@ :
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@ CPU_CRITICAL_ENTER(); /* cpu_sr = CPU_SR_Save(); */
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@ :
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@ :
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@ CPU_CRITICAL_EXIT(); /* CPU_SR_Restore(cpu_sr); */
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@ :
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@ }
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@********************************************************************************************************
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.thumb_func
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CPU_SR_Save:
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MRS R0, PRIMASK @ Set prio int mask to mask all (except faults)
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CPSID I
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BX LR
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.thumb_func
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CPU_SR_Restore: @ See Note #2.
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MSR PRIMASK, R0
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BX LR
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@********************************************************************************************************
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@ WAIT FOR INTERRUPT
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@
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@ Description : Enters sleep state, which will be exited when an interrupt is received.
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@
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@ Prototypes : void CPU_WaitForInt (void)
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@
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@ Argument(s) : none.
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@********************************************************************************************************
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.thumb_func
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CPU_WaitForInt:
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WFI @ Wait for interrupt
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BX LR
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@********************************************************************************************************
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@ WAIT FOR EXCEPTION
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@
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@ Description : Enters sleep state, which will be exited when an exception is received.
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@
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@ Prototypes : void CPU_WaitForExcept (void)
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@
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@ Argument(s) : none.
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@********************************************************************************************************
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.thumb_func
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CPU_WaitForExcept:
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WFE @ Wait for exception
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BX LR
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@********************************************************************************************************
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@ CPU ASSEMBLY PORT FILE END
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@********************************************************************************************************
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.end
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