265 lines
9.0 KiB
C
265 lines
9.0 KiB
C
/***************************************************************************
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* Copyright (C) 2020 by Federico Amedeo Izzo IU2NUO, *
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* Niccolò Izzo IU2KIN *
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* Frederik Saraci IU2NRO *
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* Silvano Seva IU2KWO *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 3 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, see <http://www.gnu.org/licenses/> *
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***************************************************************************/
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#include <hwconfig.h>
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#include <interfaces/gpio.h>
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#include <interfaces/delays.h>
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#include <hwconfig.h>
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#include "HR_C5000.h"
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const uint8_t initSeq1[] = {0x00, 0x00, 0xFF, 0xB0, 0x00, 0x00, 0x00, 0x00};
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const uint8_t initSeq2[] =
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{
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0x00, 0x11, 0x80, 0x0A, 0x22, 0x01, 0x00, 0x00, 0x33, 0xEF, 0x00, 0xFF, 0xFF,
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0xFF, 0xF0, 0xF0, 0x10, 0x00, 0x00, 0x07, 0x3B, 0xF8, 0x0E, 0xFD, 0x40, 0xFF,
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0x00, 0x0B, 0x00, 0x00, 0x00, 0x04, 0x0B, 0x00, 0x17, 0x02, 0xFF, 0xE0, 0x28,
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0xF0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
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};
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const uint8_t initSeq3[] =
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{
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0x01, 0x10, 0x69, 0x69, 0x96, 0x96, 0x96, 0x99, 0x99, 0x99, 0xA5, 0xA5, 0xAA,
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0xAA, 0xCC, 0xCC, 0x00, 0xF0, 0x01, 0xFF, 0x01, 0x0F
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};
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const uint8_t initSeq4[] = {0x01, 0x30, 0x30, 0x4E, 0x14, 0x1E, 0x1A, 0x30, 0x3D,
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0x50, 0x07, 0x60};
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const uint8_t initSeq5[] = {0x01, 0x40, 0x90, 0x03, 0x01, 0x02, 0x05, 0x07, 0xF0};
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const uint8_t initSeq6[] = {0x01, 0x50, 0x00, 0x00, 0x00, 0x00, 0x00};
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uint8_t _spiSendRecv(uint8_t value)
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{
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gpio_clearPin(DMR_CLK);
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uint8_t incoming = 0;
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uint8_t cnt = 0;
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for(; cnt < 8; cnt++)
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{
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gpio_setPin(DMR_CLK);
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if(value & (0x80 >> cnt))
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{
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gpio_setPin(DMR_MOSI);
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}
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else
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{
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gpio_clearPin(DMR_MOSI);
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}
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delayUs(1);
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gpio_clearPin(DMR_CLK);
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incoming = (incoming << 1) | gpio_readPin(DMR_MISO);
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delayUs(1);
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}
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return incoming;
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}
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void _writeReg(uint8_t type, uint8_t reg, uint8_t val)
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{
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gpio_clearPin(DMR_CS);
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(void) _spiSendRecv(type);
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(void) _spiSendRecv(reg);
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(void) _spiSendRecv(val);
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gpio_setPin(DMR_CS);
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}
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void _sendSequence(const uint8_t *seq, uint8_t len)
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{
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gpio_clearPin(DMR_CS);
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uint8_t i = 0;
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for(; i < len; i++)
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{
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(void) _spiSendRecv(seq[i]);
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}
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gpio_setPin(DMR_CS);
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}
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void C5000_init()
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{
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gpio_setMode(DMR_CS, OUTPUT);
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gpio_setMode(DMR_CLK, OUTPUT);
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gpio_setMode(DMR_MOSI, OUTPUT);
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gpio_setMode(DMR_MISO, OUTPUT);
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gpio_setMode(DMR_SLEEP, OUTPUT);
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gpio_setPin(DMR_CS);
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gpio_clearPin(DMR_SLEEP); // Exit from sleep pulling down DMR_SLEEP
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_writeReg(0x00, 0x0A, 0x80); // Internal clock connected to crystal
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_writeReg(0x00, 0x0B, 0x28); // PLL M register (multiplier)
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_writeReg(0x00, 0x0C, 0x33); // PLL input and output dividers
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delayMs(1);
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_writeReg(0x00, 0x0A, 0x00); // Internal clock connected to PLL
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_writeReg(0x00, 0xBA, 0x22); // Built-in codec clock freq. (HR_C6000)
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_writeReg(0x00, 0xBB, 0x11); // Output clock operating freq. (HR_C6000)
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}
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void C5000_terminate()
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{
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gpio_setPin(DMR_SLEEP);
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gpio_setMode(DMR_CS, INPUT);
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gpio_setMode(DMR_CLK, INPUT);
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gpio_setMode(DMR_MOSI, INPUT);
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gpio_setMode(DMR_MISO, INPUT);
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gpio_setMode(DMR_SLEEP, INPUT);
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}
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void C5000_setModOffset(uint8_t offset)
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{
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/*
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* Original TYT MD-380 code does this, both for DMR and FM.
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*
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* References: functions @0x0803fda8 and @0x0804005c
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*/
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uint8_t offUpper = (offset < 0x80) ? 0x00 : 0x03;
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uint8_t offLower = 0x7F - offset;
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_writeReg(0x00, 0x48, offUpper); // Two-point bias, upper value
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_writeReg(0x00, 0x47, offLower); // Two-point bias, lower value
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_writeReg(0x00, 0x04, offLower); // Bias value for TX, Q-channel
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}
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void C5000_setModAmplitude(uint8_t iAmp, uint8_t qAmp)
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{
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_writeReg(0x00, 0x45, iAmp); // Mod2 magnitude (HR_C6000)
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_writeReg(0x00, 0x46, qAmp); // Mod1 magnitude (HR_C6000)
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}
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void C5000_setModFactor(uint8_t mf)
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{
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_writeReg(0x00, 0x35, mf); // FM modulation factor
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_writeReg(0x00, 0x3F, 0x04); // FM Limiting modulation factor (HR_C6000)
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}
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void C5000_dmrMode()
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{
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// _writeReg(0x00, 0x0A, 0x80);
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// _writeReg(0x00, 0x0B, 0x28);
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// _writeReg(0x00, 0x0C, 0x33);
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// OSTimeDly(1, OS_OPT_TIME_DLY, &e);
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// _writeReg(0x00, 0x0A, 0x00);
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_writeReg(0x00, 0xB9, 0x32);
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// _writeReg(0x00, 0xBA, 0x22);
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// _writeReg(0x00, 0xBB, 0x11);
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_writeReg(0x00, 0x10, 0x4F);
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_writeReg(0x00, 0x40, 0x43);
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_writeReg(0x00, 0x41, 0x40);
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_writeReg(0x00, 0x07, 0x0B);
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_writeReg(0x00, 0x08, 0xB8);
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_writeReg(0x00, 0x09, 0x00);
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_writeReg(0x00, 0x06, 0x21);
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_sendSequence(initSeq1, sizeof(initSeq1));
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// _writeReg(0x00, 0x48, 0x00);
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// _writeReg(0x00, 0x47, 0x1F); // This is 0x7F - freq_adj_mid */
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_sendSequence(initSeq2, sizeof(initSeq2));
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_writeReg(0x00, 0x00, 0x28);
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delayMs(1);
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_writeReg(0x00, 0x14, 0x59);
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_writeReg(0x00, 0x15, 0xF5);
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_writeReg(0x00, 0x16, 0x21);
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_sendSequence(initSeq3, sizeof(initSeq3));
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_sendSequence(initSeq4, sizeof(initSeq4));
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_sendSequence(initSeq5, sizeof(initSeq5));
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_sendSequence(initSeq6, sizeof(initSeq6));
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_writeReg(0x01, 0x52, 0x08);
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_writeReg(0x01, 0x53, 0xEB);
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_writeReg(0x01, 0x54, 0x78);
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_writeReg(0x01, 0x45, 0x1E);
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_writeReg(0x01, 0x37, 0x50);
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_writeReg(0x01, 0x35, 0xFF);
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_writeReg(0x00, 0x39, 0x02);
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_writeReg(0x00, 0x3D, 0x0A);
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_writeReg(0x00, 0x83, 0xFF);
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_writeReg(0x00, 0x87, 0x00);
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_writeReg(0x00, 0x65, 0x0A);
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_writeReg(0x00, 0x1D, 0xFF);
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_writeReg(0x00, 0x1E, 0xF1);
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_writeReg(0x00, 0x1F, 0x10);
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_writeReg(0x00, 0x0D, 0x8C);
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_writeReg(0x00, 0x0E, 0x44);
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_writeReg(0x00, 0x0F, 0xC8);
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_writeReg(0x00, 0x37, 0xC2);
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_writeReg(0x00, 0x25, 0x0E);
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_writeReg(0x00, 0x26, 0xFD);
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_writeReg(0x00, 0x64, 0x00);
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_writeReg(0x01, 0x24, 0x00);
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_writeReg(0x01, 0x25, 0x00);
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_writeReg(0x01, 0x26, 0x00);
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_writeReg(0x01, 0x27, 0x00);
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_writeReg(0x00, 0x81, 0x19);
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_writeReg(0x00, 0x85, 0x00);
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}
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void C5000_fmMode()
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{
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_writeReg(0x00, 0xB9, 0x33); // System clock frequency (HR_C6000)
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_writeReg(0x00, 0x10, 0x80); // FM modulator mode
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_writeReg(0x00, 0x07, 0x0E); // IF frequency - upper 8 bits
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_writeReg(0x00, 0x08, 0x10); // IF frequency - middle 8 bits
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_writeReg(0x00, 0x09, 0x00); // IF frequency - lower 8 bits
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_sendSequence(initSeq1, sizeof(initSeq1));
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_writeReg(0x00, 0x06, 0x00); // VoCoder control
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_sendSequence(initSeq2, sizeof(initSeq2));
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_writeReg(0x00, 0x0D, 0x8C); // Codec control
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_writeReg(0x00, 0x0E, 0x44); // Mute HPout and enable MIC 1
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_writeReg(0x00, 0x0F, 0xC8); // ADLinVol, mic volume
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// _writeReg(0x00, 0x25, 0x0E);
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// _writeReg(0x00, 0x26, 0xFE);
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_writeReg(0x00, 0x83, 0xFF); // Clear all interrupt flags
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_writeReg(0x00, 0x87, 0x00); // Disable "stop" interrupts
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_writeReg(0x00, 0x81, 0x00); // Mask other interrupts
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_writeReg(0x00, 0x60, 0x00); // Disable both analog and DMR transmission
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_writeReg(0x00, 0x00, 0x28); // Reset register
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}
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void C5000_startAnalogTx()
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{
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_writeReg(0x00, 0x0D, 0x8C); // Codec control
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_writeReg(0x00, 0x0E, 0x44); // Mute HPout and enable MIC 1
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_writeReg(0x00, 0x0F, 0xC8); // ADLinVol, mic volume
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// _writeReg(0x00, 0x25, 0x0E);
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// _writeReg(0x00, 0x26, 0xFE);
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_writeReg(0x00, 0x34, 0x3C); // Enable pre-emphasis, 25kHz bandwidth
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_writeReg(0x00, 0x3E, 0x08); // "FM Modulation frequency deviation coefficient at the receiving end" (HR_C6000)
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_writeReg(0x00, 0x37, 0xC2); // Unknown register
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// _writeReg(0x01, 0x50, 0x00);
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// _writeReg(0x01, 0x51, 0x00);
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_writeReg(0x00, 0x60, 0x80); // Enable analog voice transmission
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}
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void C5000_stopAnalogTx()
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{
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_writeReg(0x00, 0x60, 0x00); // Disable both analog and DMR transmission
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}
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bool C5000_spiInUse()
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{
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return (gpio_readPin(DMR_CS) == 0) ? true : false;
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}
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