Silvano Seva 85a89d1f84 Doubled the prescale value of all the timers, since they run at twice the frequency of the bus they are connected to		2020-11-16 18:03:02 +01:00
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ADC	Workaround for an STM32F405 bug causing a delay between an RCC peripheral clock enable and the effective peripheral enabling, as described in ST's silicon errata sheet	2020-11-16 11:24:52 +01:00
baseband	Added missing folder	2020-11-03 15:15:35 +01:00
display	Workaround for an STM32F405 bug causing a delay between an RCC peripheral clock enable and the effective peripheral enabling, as described in ST's silicon errata sheet	2020-11-16 11:24:52 +01:00
keyboard	Adding the remaining part of issue #5 fix, forgot in the previous commit	2020-11-15 21:16:49 +01:00
tones	Doubled the prescale value of all the timers, since they run at twice the frequency of the bus they are connected to	2020-11-16 18:03:02 +01:00