246 lines
7.8 KiB
C++
246 lines
7.8 KiB
C++
/***************************************************************************
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* Copyright (C) 2020 by Terraneo Federico *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 2 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* As a special exception, if other files instantiate templates or use *
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* macros or inline functions from this file, or you compile this file *
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* and link it with other works to produce a work based on this file, *
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* this file does not by itself cause the resulting work to be covered *
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* by the GNU General Public License. However the source code for this *
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* file must still be made available in accordance with the GNU General *
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* Public License. This exception does not invalidate any other reasons *
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* why a work based on this file might be covered by the GNU General *
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* Public License. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, see <http://www.gnu.org/licenses/> *
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***************************************************************************/
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#include <limits>
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#include <cstring>
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#include <errno.h>
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#include <termios.h>
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#include "serial_atsam4l.h"
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#include "kernel/sync.h"
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#include "kernel/scheduler/scheduler.h"
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#include "interfaces/portability.h"
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#include "filesystem/ioctl.h"
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using namespace std;
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using namespace miosix;
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static const int numPorts=4; //USART0 to USART3
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/// Pointer to serial port classes to let interrupts access the classes
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static ATSAMSerial *ports[numPorts]={0};
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/**
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* \internal interrupt routine for usart2 rx actual implementation
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*/
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void __attribute__((noinline)) usart2rxIrqImpl()
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{
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if(ports[2]) ports[2]->IRQhandleInterrupt();
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}
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/**
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* \internal interrupt routine for usart2 rx
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*/
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void __attribute__((naked)) USART2_Handler()
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{
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saveContext();
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asm volatile("bl _Z15usart2rxIrqImplv");
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restoreContext();
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}
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namespace miosix {
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//
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// class ATSAMSerial
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//
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// A note on the baudrate/500: the buffer is selected so as to withstand
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// 20ms of full data rate. In the 8N1 format one char is made of 10 bits.
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// So (baudrate/10)*0.02=baudrate/500
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ATSAMSerial::ATSAMSerial(int id, int baudrate)
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: Device(Device::TTY), rxQueue(rxQueueMin+baudrate/500), rxWaiting(0),
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idle(true), portId(id)
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{
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if(id!=2 || ports[portId]) errorHandler(UNEXPECTED);
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{
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InterruptDisableLock dLock;
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ports[portId]=this;
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port=USART2;
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//TODO: USART2 hardcoded
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PM->PM_UNLOCK=0xaa<<24 | PM_PBAMASK_OFFSET;
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PM->PM_PBAMASK |= PM_PBAMASK_USART2;
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NVIC_SetPriority(USART2_IRQn,15);//Lowest priority for serial
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NVIC_EnableIRQ(USART2_IRQn);
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}
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port->US_BRGR = ((SystemCoreClock/baudrate/4)+1)/2; //TODO: fractional part
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port->US_MR = US_MR_FILTER // Filter input with majority of 3 samples
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| US_MR_OVER // 8 cycles oversample
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| US_MR_PAR_NONE // No parity
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| US_MR_CHRL_8 // 8 bit char
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| US_MR_USCLKS_MCK // CLK_USART is clock source
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| US_MR_MODE_NORMAL;// Just a plain usart, please
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port->US_RTOR=10; //Timeout 10 bits (one char time)
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port->US_IER = US_IER_RXRDY | US_IER_TIMEOUT;
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port->US_CR = US_CR_TXEN | US_CR_RXEN;
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}
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ssize_t ATSAMSerial::readBlock(void *buffer, size_t size, off_t where)
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{
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Lock<FastMutex> l(rxMutex);
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char *buf=reinterpret_cast<char*>(buffer);
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size_t result=0;
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FastInterruptDisableLock dLock;
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for(;;)
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{
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//Try to get data from the queue
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for(;result<size;result++)
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{
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if(rxQueue.tryGet(buf[result])==false) break;
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//This is here just not to keep IRQ disabled for the whole loop
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FastInterruptEnableLock eLock(dLock);
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}
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if(idle && result>0) break;
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if(result==size) break;
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//Wait for data in the queue
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do {
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rxWaiting=Thread::IRQgetCurrentThread();
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Thread::IRQwait();
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{
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FastInterruptEnableLock eLock(dLock);
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Thread::yield();
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}
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} while(rxWaiting);
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}
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return result;
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}
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ssize_t ATSAMSerial::writeBlock(const void *buffer, size_t size, off_t where)
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{
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Lock<FastMutex> l(txMutex);
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const char *buf=reinterpret_cast<const char*>(buffer);
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for(size_t i=0;i<size;i++)
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{
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while((port->US_CSR & US_CSR_TXRDY) == 0) ;
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port->US_THR =*buf++;
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}
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return size;
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}
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void ATSAMSerial::IRQwrite(const char *str)
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{
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// We can reach here also with only kernel paused, so make sure
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// interrupts are disabled.
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bool interrupts=areInterruptsEnabled();
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if(interrupts) fastDisableInterrupts();
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while(*str)
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{
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while((port->US_CSR & US_CSR_TXRDY) == 0) ;
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port->US_THR = *str++;
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}
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waitSerialTxFifoEmpty();
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if(interrupts) fastEnableInterrupts();
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}
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int ATSAMSerial::ioctl(int cmd, void *arg)
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{
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if(reinterpret_cast<unsigned>(arg) & 0b11) return -EFAULT; //Unaligned
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termios *t=reinterpret_cast<termios*>(arg);
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switch(cmd)
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{
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case IOCTL_SYNC:
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waitSerialTxFifoEmpty();
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return 0;
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case IOCTL_TCGETATTR:
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t->c_iflag=IGNBRK | IGNPAR;
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t->c_oflag=0;
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t->c_cflag=CS8;
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t->c_lflag=0;
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return 0;
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case IOCTL_TCSETATTR_NOW:
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case IOCTL_TCSETATTR_DRAIN:
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case IOCTL_TCSETATTR_FLUSH:
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//Changing things at runtime unsupported, so do nothing, but don't
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//return error as console_device.h implements some attribute changes
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return 0;
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default:
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return -ENOTTY; //Means the operation does not apply to this descriptor
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}
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}
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void ATSAMSerial::IRQhandleInterrupt()
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{
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bool wake=false;
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unsigned int status=port->US_CSR;
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if(status & US_CSR_RXRDY)
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{
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wake=true;
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//Always read the char (resets flags), but put it in the queue only if
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//no framing error
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char c=port->US_RHR;
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if((status & US_CSR_FRAME) == 0)
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{
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if(rxQueue.tryPut(c & 0xff)==false) /*fifo overflow*/;
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idle=false;
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}
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}
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if(status & US_CSR_TIMEOUT)
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{
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wake=true;
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port->US_CR=US_CR_STTTO;
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idle=true;
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}
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if(wake && rxWaiting)
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{
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rxWaiting->IRQwakeup();
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if(rxWaiting->IRQgetPriority()>
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Thread::IRQgetCurrentThread()->IRQgetPriority())
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Scheduler::IRQfindNextThread();
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rxWaiting=0;
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}
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}
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ATSAMSerial::~ATSAMSerial()
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{
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waitSerialTxFifoEmpty();
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port->US_CR = US_CR_TXDIS | US_CR_RXDIS;
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port->US_IDR = US_IDR_RXRDY | US_IDR_TIMEOUT;
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InterruptDisableLock dLock;
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ports[portId]=nullptr;
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//TODO: USART2 hardcoded
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NVIC_DisableIRQ(USART2_IRQn);
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NVIC_ClearPendingIRQ(USART2_IRQn);
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PM->PM_UNLOCK=0xaa<<24 | PM_PBAMASK_OFFSET;
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PM->PM_PBAMASK &= ~PM_PBAMASK_USART2;
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}
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void ATSAMSerial::waitSerialTxFifoEmpty()
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{
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while((port->US_CSR & US_CSR_TXEMPTY) == 0) ;
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}
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} //namespace miosix
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