Silvano Seva d1b4973cc9 Fixed reset of DC bias on stream stop in Module 17 output stream driver, made parametric the gain of the RRC at modulator side		2022-05-27 21:48:47 +02:00
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drivers	Fixed reset of DC bias on stream stop in Module 17 output stream driver, made parametric the gain of the RRC at modulator side	2022-05-27 21:48:47 +02:00
mcu	Quick and dirty bugfix to STM32F4 USB VCOM driver to allow data transfers of more than 300 bytes	2022-03-06 08:44:52 +01:00
targets	Biased Module 17 baseband DAC output to Vdd/2 when idle	2022-05-27 21:48:47 +02:00