159 lines
4.5 KiB
C
159 lines
4.5 KiB
C
/***************************************************************************
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* Copyright (C) 2021 - 2025 by Federico Amedeo Izzo IU2NUO, *
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* Niccolò Izzo IU2KIN *
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* Frederik Saraci IU2NRO *
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* Silvano Seva IU2KWO *
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* *
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* This program is free software; you can redistribute it and/or modify *
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* it under the terms of the GNU General Public License as published by *
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* the Free Software Foundation; either version 3 of the License, or *
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* (at your option) any later version. *
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* *
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* This program is distributed in the hope that it will be useful, *
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* but WITHOUT ANY WARRANTY; without even the implied warranty of *
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
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* GNU General Public License for more details. *
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* *
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* You should have received a copy of the GNU General Public License *
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* along with this program; if not, see <http://www.gnu.org/licenses/> *
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***************************************************************************/
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#include "rcc.h"
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#include <errno.h>
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#include "stm32f4xx.h"
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#include "spi_stm32.h"
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static inline uint8_t spi_sendRecv(SPI_TypeDef *spi, const uint8_t val)
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{
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spi->DR = val;
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while((spi->SR & SPI_SR_RXNE) == 0) ;
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return spi->DR;
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}
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int spiStm32_init(const struct spiDevice *dev, const uint32_t speed, const uint8_t flags)
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{
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SPI_TypeDef *spi = (SPI_TypeDef *) dev->priv;
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uint8_t busId;
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switch((uint32_t) spi)
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{
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case SPI1_BASE:
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busId = PERIPH_BUS_APB2;
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RCC->APB2ENR |= RCC_APB2ENR_SPI1EN;
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__DSB();
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break;
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case SPI2_BASE:
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busId = PERIPH_BUS_APB1;
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RCC->APB1ENR |= RCC_APB1ENR_SPI2EN;
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__DSB();
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break;
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case SPI3_BASE:
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busId = PERIPH_BUS_APB1;
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RCC->APB1ENR |= RCC_APB1ENR_SPI3EN;
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__DSB();
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break;
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default:
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return -ENODEV;
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break;
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}
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uint8_t spiDiv;
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uint32_t spiClk;
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uint32_t busClk = rcc_getBusClock(busId);
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// Find nearest clock frequency, round down
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for(spiDiv = 0; spiDiv < 7; spiDiv += 1)
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{
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spiClk = busClk / (1 << (spiDiv + 1));
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if(spiClk <= speed)
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break;
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}
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if(spiClk > speed)
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return -EINVAL;
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spi->CR1 = SPI_CR1_SSM // Software managment of nCS
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| SPI_CR1_SSI // Force internal nCS
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| (spiDiv << 3) // Baud rate
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| SPI_CR1_MSTR; // Master mode
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if((flags & SPI_FLAG_CPOL) != 0)
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spi->CR1 |= SPI_CR1_CPOL;
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if((flags & SPI_FLAG_CPHA) != 0)
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spi->CR1 |= SPI_CR1_CPHA;
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if((flags & SPI_LSB_FIRST) != 0)
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spi->CR1 |= SPI_CR1_LSBFIRST;
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spi->CR1 |= SPI_CR1_SPE; // Enable peripheral
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if(dev->mutex != NULL)
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pthread_mutex_init((pthread_mutex_t *) dev->mutex, NULL);
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return 0;
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}
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void spiStm32_terminate(const struct spiDevice *dev)
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{
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SPI_TypeDef *spi = (SPI_TypeDef *) dev->priv;
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switch((uint32_t) spi)
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{
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case SPI1_BASE:
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RCC->APB2ENR &= ~RCC_APB2ENR_SPI1EN;
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__DSB();
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break;
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case SPI2_BASE:
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RCC->APB1ENR &= ~RCC_APB1ENR_SPI2EN;
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__DSB();
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break;
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case SPI3_BASE:
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RCC->APB1ENR &= ~RCC_APB1ENR_SPI3EN;
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__DSB();
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break;
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}
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if(dev->mutex != NULL)
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pthread_mutex_destroy((pthread_mutex_t *) dev->mutex);
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}
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int spiStm32_transfer(const struct spiDevice *dev, const void *txBuf,
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void *rxBuf, const size_t size)
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{
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SPI_TypeDef *spi = (SPI_TypeDef *) dev->priv;
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uint8_t *rxData = (uint8_t *) rxBuf;
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const uint8_t *txData = (const uint8_t *) txBuf;
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// Send only
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if(rxBuf == NULL)
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{
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for(size_t i = 0; i < size; i++)
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spi_sendRecv(spi, txData[i]);
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return 0;
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}
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// Receive only
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if(txBuf == NULL)
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{
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for(size_t i = 0; i < size; i++)
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rxData[i] = spi_sendRecv(spi, 0x00);
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return 0;
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}
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// Transmit and receive
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for(size_t i = 0; i < size; i++)
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rxData[i] = spi_sendRecv(spi, txData[i]);
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return 0;
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}
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