update ATMlib
Optimized Assembly code saving more bytes and saving a few cycles Moved and refactored assemby from ATMlib.h code to ATMlib.cpp fix muteChannel() and unMuteChannel() so (un)mutes channel properly Added C++ equivalent ISR code
This commit is contained in:
Mr.Blinky
GitHub
parent
1cc93f05d7
commit
315c3c45e9
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@ -1,9 +1,192 @@
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#include "ATMlib.h"
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#ifndef AB_ALTERNATE_WIRING
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ATMLIB_CONSTRUCT_ISR(OCR4A)
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uint16_t __attribute__((used)) cia, __attribute__((used)) cia_count;
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#ifdef __AVR_ARCH__
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ISR(TIMER4_OVF_vect, ISR_NAKED) {
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asm volatile(
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"push r18 \n"
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"lds r18, half \n" // half = !half;
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"sbrc r18, 0 \n" // if (half) return;
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"rjmp 2f \n"
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"ldi r18, 0xFF \n"
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"1: \n"
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"sts half, r18 \n"
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"pop r18 \n"
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"reti \n"
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"2: \n"
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"push r0 \n"
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"push r1 \n"
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"push r2 \n"
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"in r2, __SREG__ \n"
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"push r30 \n"
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"push r31 \n"
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"ldi r30, lo8(osc) \n"
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"ldi r31, hi8(osc) \n"
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"ldi r18, 1 \n"
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"ldd r0, Z+3*%[mul]+%[fre] \n" // uint16_t freq = osc[3].freq; //noise frequency
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"ldd r1, Z+3*%[mul]+%[fre]+1 \n"
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"add r0, r0 \n" // freq <<= 1;
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"adc r1, r1 \n"
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"sbrc r1, 7 \n" // if (freq & 0x8000) freq ^= 1;
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"eor r0, r18 \n"
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"sbrc r1, 6 \n" // if (freq & 0x4000) freq ^= 1;
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"eor r0, r18 \n"
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"std Z+3*%[mul]+%[fre], r0 \n" // osc[3].freq = freq;
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"std Z+3*%[mul]+%[fre]+1, r1 \n"
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"ldd r18, Z+3*%[mul]+%[vol] \n" // int8_t vol = osc[3].vol;
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"sbrc r1, 7 \n" // if (freq & 0x8000) vol = -vol;
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"neg r18 \n"
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"mov r1, r18 \n"
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"ldd r0, Z+0*%[mul]+%[fre] \n" // osc[0].phase += osc[0].freq; // update pulse phase
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"ldd r18, Z+0*%[mul]+%[pha] \n"
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"add r18, r0 \n"
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"std Z+0*%[mul]+%[pha], r18 \n"
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"ldd r0, Z+0*%[mul]+%[fre]+1 \n"
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"ldd r18, Z+0*%[mul]+%[pha]+1 \n"
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"adc r18, r0 \n"
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"std Z+0*%[mul]+%[pha]+1, r18 \n"
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"ldd r0, Z+0*%[mul]+%[vol] \n" // int8_t vol0 = osc[0].vol;
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"cpi r18, 192 \n" // if (uint8_t(osc[0].phase >> 8) >= 192) vol0 = -vol0;
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"brcs 3f \n"
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"neg r0 \n"
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"add r1, r0 \n" // int8_t vol += vol0;
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"3: \n"
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"ldd r18, Z+1*%[mul]+%[fre] \n" // osc[1].phase += osc[1].freq; // update square phase
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"ldd r0, Z+1*%[mul]+%[pha] \n"
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"add r0, r18 \n"
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"std Z+1*%[mul]+%[pha], r0 \n"
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"ldd r18, Z+1*%[mul]+%[fre]+1 \n"
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"ldd r0, Z+1*%[mul]+%[pha]+1 \n"
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"adc r0, r18 \n"
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"std Z+1*%[mul]+%[pha]+1, r0 \n"
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"ldd r18, Z+1*%[mul]+%[vol] \n" // int8_t vol1 = osc[1].vol;
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"sbrc r0, 7 \n" // if (osc[1].phase & 0x8000) vol1 = -vol1;
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"neg r18 \n"
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"add r1, r18 \n" // vol += vol1;
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"ldd r18, Z+2*%[mul]+%[fre] \n" // osc[2].phase += osc[2].freq;// update triangle phase
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"ldd r0, Z+2*%[mul]+%[pha] \n"
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"add r0, r18 \n"
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"std Z+2*%[mul]+%[pha], r0 \n"
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"ldd r0, Z+2*%[mul]+%[fre]+1 \n"
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"ldd r18, Z+2*%[mul]+%[pha]+1 \n"
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"adc r18, r0 \n"
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"std Z+2*%[mul]+%[pha]+1, r18 \n"
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// int8_t phase2 = osc[2].phase >> 8;
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"ldd r30, Z+2*%[mul]+%[vol] \n" // int8_t vol2 = osc[2].vol;
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"lds r31, pcm \n" // int8_t tmp = pcm + vol;
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"add r31, r1 \n"
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"sbrc r18, 7 \n" // if (phase2 < 0) phase2 = ~phase2;
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"com r18 \n"
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"lsl r18 \n" // phase2 <<= 1;
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"subi r18, 128 \n" // phase2 -= 128;
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"muls r18, r30 \n" // vol = ((phase2 * vol2) << 1) >> 8 + tmp;
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"lsl r1 \n"
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"add r1, r31 \n"
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"sts %[reg], r1 \n" // reg = vol;
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#ifdef AB_ALTERNATE_WIRING
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"sts %[reg2], r1 \n" // reg2 = vol;
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#endif
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"lds r31, cia_count+1 \n" // if (--cia_count) return;
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"lds r30, cia_count \n"
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"sbiw r30, 1 \n"
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"brne 4f \n"
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"lds r31, cia+1 \n" // cia_count = cia;
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"lds r30, cia \n"
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"4: \n"
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"sts cia_count+1, r31 \n"
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"sts cia_count, r30 \n"
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"brne 5f \n"
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"sei \n" // sei();
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"push r19 \n"
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"push r20 \n"
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"push r21 \n"
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"push r22 \n"
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"push r23 \n"
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"push r24 \n"
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"push r25 \n"
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"push r26 \n"
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"push r27 \n"
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"clr r1 \n"
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"call ATM_playroutine \n" // ATM_playroutine();
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"pop r27 \n" // }
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"pop r26 \n"
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"pop r25 \n"
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"pop r24 \n"
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"pop r23 \n"
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"pop r22 \n"
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"pop r21 \n"
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"pop r20 \n"
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"pop r19 \n"
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"5: \n"
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"pop r31 \n"
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"pop r30 \n"
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"out __SREG__, r2 \n"
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"pop r2 \n"
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"pop r1 \n"
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"pop r0 \n"
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"ldi r18, 0x00 \n"
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"rjmp 1b \n"
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:
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: [reg] "M" _SFR_MEM_ADDR(OCR4A),
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#ifdef AB_ALTERNATE_WIRING
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[reg2] "M" _SFR_MEM_ADDR(OCR4D),
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#endif
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[mul] "M" (sizeof(Oscillator)),
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[pha] "M" (offsetof(Oscillator, phase)),
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[fre] "M" (offsetof(Oscillator, freq)),
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[vol] "M" (offsetof(Oscillator, vol))
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);
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}
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#else
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ATMLIB_CONSTRUCT_ISR(OCR4A,OCR4D)
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ISR(TIMER4_OVF_vect)
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{
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half = !half;
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if (half) return;
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osc[2].phase += osc[2].freq; // update triangle phase
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int8_t phase2 = osc[2].phase >> 8;
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if (phase2 < 0) phase2 = ~phase2;
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phase2 <<= 1;
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phase2 -= 128;
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int8_t vol = ((phase2 * int8_t(osc[2].vol)) << 1) >> 8;
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osc[0].phase += osc[0].freq; // update pulse phase
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int8_t vol0 = osc[0].vol;
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if (osc[0].phase >= 0xC000) vol0 = -vol0;
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vol += vol0;
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osc[1].phase += osc[1].freq; // update square phase
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int8_t vol1 = osc[1].vol;
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if (osc[1].phase & 0x8000) vol1 = -vol1;
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vol += vol1;
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uint16_t freq = osc[3].freq; //noise frequency
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freq <<= 1;
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if (freq & 0x8000) freq ^= 1;
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if (freq & 0x4000) freq ^= 1;
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osc[3].freq = freq;
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int8_t vol3 = osc[3].vol;
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if (freq & 0x8000) vol3 = -vol3;
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vol += vol3;
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OCR4A = vol + pcm;
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if (--cia_count) return;
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cia_count = cia;
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sei();
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ATM_playroutine();
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}
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#endif
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byte trackCount;
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@ -131,7 +314,7 @@ void ATMsynth::play(const byte *song) {
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#ifdef AB_ALTERNATE_WIRING
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TCCR4C = 0b01000101;
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OCR4D = 0x80;
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#endif
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#endif
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// Load a melody stream and start grinding samples
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// Read track count
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@ -162,11 +345,11 @@ void ATMsynth::playPause() {
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// Toggle mute on/off on a channel, so it can be used for sound effects
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// So you have to call it before and after the sound effect
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void ATMsynth::muteChannel(byte ch) {
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ChannelActiveMute += (1 << 0 );
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ChannelActiveMute += (1 << ch );
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}
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void ATMsynth::unMuteChannel(byte ch) {
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ChannelActiveMute &= (~(1 << 0 ));
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ChannelActiveMute &= (~(1 << ch ));
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}
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@ -406,7 +589,7 @@ void ATM_playroutine() {
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}
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}
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// if all channels are inactive, stop playing or check for repeat
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if (!(ChannelActiveMute & 0xF0))
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{
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byte repeatSong = 0;
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@ -51,303 +51,5 @@ extern osc_t osc[4];
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uint16_t read_vle(const byte **pp);
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static inline const byte *getTrackPointer(byte track);
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extern void ATM_playroutine() asm("ATM_playroutine");
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#ifndef AB_ALTERNATE_WIRING
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#define ATMLIB_CONSTRUCT_ISR(TARGET_REGISTER) \
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uint16_t __attribute__((used)) cia, __attribute__((used)) cia_count; \
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ISR(TIMER4_OVF_vect, ISR_NAKED) { \
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asm volatile( \
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"push r2 " "\n\t" \
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"in r2, __SREG__ " "\n\t" \
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"push r18 " "\n\t" \
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"lds r18, half " "\n\t" \
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"com r18 " "\n\t" \
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"sts half, r18 " "\n\t" \
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"breq 1f " "\n\t" \
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"rjmp 3f " "\n\t" \
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"1: " "\n\t" \
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"push r27 " "\n\t" \
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"push r26 " "\n\t" \
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"push r0 " "\n\t" \
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"push r1 " "\n\t" \
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\
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"lds r18, osc+2*%[mul]+%[fre] " "\n\t" \
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"lds r0, osc+2*%[mul]+%[pha] " "\n\t" \
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"add r0, r18 " "\n\t" \
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"sts osc+2*%[mul]+%[pha], r0 " "\n\t" \
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"lds r18, osc+2*%[mul]+%[fre]+1" "\n\t" \
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"lds r1, osc+2*%[mul]+%[pha]+1" "\n\t" \
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"adc r1, r18 " "\n\t" \
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"sts osc+2*%[mul]+%[pha]+1, r1 " "\n\t" \
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\
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"mov r27, r1 " "\n\t" \
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"sbrc r27, 7 " "\n\t" \
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"com r27 " "\n\t" \
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"lsl r27 " "\n\t" \
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"lds r26, osc+2*%[mul]+%[vol] " "\n\t" \
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"subi r27, 128 " "\n\t" \
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"muls r27, r26 " "\n\t" \
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"lsl r1 " "\n\t" \
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"mov r26, r1 " "\n\t" \
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\
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"lds r18, osc+0*%[mul]+%[fre] " "\n\t" \
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"lds r0, osc+0*%[mul]+%[pha] " "\n\t" \
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"add r0, r18 " "\n\t" \
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"sts osc+0*%[mul]+%[pha], r0 " "\n\t" \
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"lds r18, osc+0*%[mul]+%[fre]+1" "\n\t" \
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"lds r1, osc+0*%[mul]+%[pha]+1" "\n\t" \
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"adc r1, r18 " "\n\t" \
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"sts osc+0*%[mul]+%[pha]+1, r1 " "\n\t" \
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\
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"mov r18, r1 " "\n\t" \
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"lsl r18 " "\n\t" \
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"and r18, r1 " "\n\t" \
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"lds r27, osc+0*%[mul]+%[vol] " "\n\t" \
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"sbrc r18, 7 " "\n\t" \
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"neg r27 " "\n\t" \
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"add r26, r27 " "\n\t" \
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\
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"lds r18, osc+1*%[mul]+%[fre] " "\n\t" \
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"lds r0, osc+1*%[mul]+%[pha] " "\n\t" \
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"add r0, r18 " "\n\t" \
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"sts osc+1*%[mul]+%[pha], r0 " "\n\t" \
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"lds r18, osc+1*%[mul]+%[fre]+1" "\n\t" \
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"lds r1, osc+1*%[mul]+%[pha]+1" "\n\t" \
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"adc r1, r18 " "\n\t" \
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"sts osc+1*%[mul]+%[pha]+1, r1 " "\n\t" \
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\
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"lds r27, osc+1*%[mul]+%[vol] " "\n\t" \
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"sbrc r1, 7 " "\n\t" \
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"neg r27 " "\n\t" \
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"add r26, r27 " "\n\t" \
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\
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"ldi r27, 1 " "\n\t" \
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"lds r0, osc+3*%[mul]+%[fre] " "\n\t" \
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"lds r1, osc+3*%[mul]+%[fre]+1" "\n\t" \
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"add r0, r0 " "\n\t" \
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"adc r1, r1 " "\n\t" \
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"sbrc r1, 7 " "\n\t" \
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"eor r0, r27 " "\n\t" \
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"sbrc r1, 6 " "\n\t" \
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"eor r0, r27 " "\n\t" \
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"sts osc+3*%[mul]+%[fre], r0 " "\n\t" \
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"sts osc+3*%[mul]+%[fre]+1, r1 " "\n\t" \
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\
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"lds r27, osc+3*%[mul]+%[vol] " "\n\t" \
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"sbrc r1, 7 " "\n\t" \
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"neg r27 " "\n\t" \
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"add r26, r27 " "\n\t" \
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\
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"lds r27, pcm " "\n\t" \
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"add r26, r27 " "\n\t" \
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"sts %[reg], r26 " "\n\t" \
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\
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"lds r27, cia_count+1 " "\n\t" \
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"lds r26, cia_count " "\n\t" \
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"sbiw r26, 1 " "\n\t" \
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"breq call_playroutine " "\n\t" \
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"sts cia_count+1, r27 " "\n\t" \
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"sts cia_count, r26 " "\n\t" \
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"rjmp 2f " "\n\t" \
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\
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"call_playroutine: " "\n\t" \
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\
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"lds r27, cia+1 " "\n\t" \
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"lds r26, cia " "\n\t" \
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"sts cia_count+1, r27 " "\n\t" \
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"sts cia_count, r26 " "\n\t" \
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\
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"sei " "\n\t" \
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"push r19 " "\n\t" \
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"push r20 " "\n\t" \
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"push r21 " "\n\t" \
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"push r22 " "\n\t" \
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"push r23 " "\n\t" \
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"push r24 " "\n\t" \
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"push r25 " "\n\t" \
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"push r30 " "\n\t" \
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"push r31 " "\n\t" \
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\
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"clr r1 " "\n\t" \
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"call ATM_playroutine " "\n\t" \
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\
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"pop r31 " "\n\t" \
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"pop r30 " "\n\t" \
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"pop r25 " "\n\t" \
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"pop r24 " "\n\t" \
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"pop r23 " "\n\t" \
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"pop r22 " "\n\t" \
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"pop r21 " "\n\t" \
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"pop r20 " "\n\t" \
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"pop r19 " "\n\t" \
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"2: " "\n\t" \
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"pop r1 " "\n\t" \
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"pop r0 " "\n\t" \
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"pop r26 " "\n\t" \
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"pop r27 " "\n\t" \
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"3: " "\n\t" \
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"pop r18 " "\n\t" \
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"out __SREG__, r2 " "\n\t" \
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"pop r2 " "\n\t" \
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"reti " "\n\t" \
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: \
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: [reg] "M" _SFR_MEM_ADDR(TARGET_REGISTER), \
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[mul] "M" (sizeof(Oscillator)), \
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[pha] "M" (offsetof(Oscillator, phase)), \
|
||||
[fre] "M" (offsetof(Oscillator, freq)), \
|
||||
[vol] "M" (offsetof(Oscillator, vol)) \
|
||||
); \
|
||||
}
|
||||
#else
|
||||
#define ATMLIB_CONSTRUCT_ISR(TARGET_REGISTER,TARGET_REGISTER2) \
|
||||
uint16_t __attribute__((used)) cia, __attribute__((used)) cia_count; \
|
||||
ISR(TIMER4_OVF_vect, ISR_NAKED) { \
|
||||
asm volatile( \
|
||||
"push r2 " "\n\t" \
|
||||
"in r2, __SREG__ " "\n\t" \
|
||||
"push r18 " "\n\t" \
|
||||
"lds r18, half " "\n\t" \
|
||||
"com r18 " "\n\t" \
|
||||
"sts half, r18 " "\n\t" \
|
||||
"breq 1f " "\n\t" \
|
||||
"rjmp 3f " "\n\t" \
|
||||
"1: " "\n\t" \
|
||||
"push r27 " "\n\t" \
|
||||
"push r26 " "\n\t" \
|
||||
"push r0 " "\n\t" \
|
||||
"push r1 " "\n\t" \
|
||||
\
|
||||
"lds r18, osc+2*%[mul]+%[fre] " "\n\t" \
|
||||
"lds r0, osc+2*%[mul]+%[pha] " "\n\t" \
|
||||
"add r0, r18 " "\n\t" \
|
||||
"sts osc+2*%[mul]+%[pha], r0 " "\n\t" \
|
||||
"lds r18, osc+2*%[mul]+%[fre]+1" "\n\t" \
|
||||
"lds r1, osc+2*%[mul]+%[pha]+1" "\n\t" \
|
||||
"adc r1, r18 " "\n\t" \
|
||||
"sts osc+2*%[mul]+%[pha]+1, r1 " "\n\t" \
|
||||
\
|
||||
"mov r27, r1 " "\n\t" \
|
||||
"sbrc r27, 7 " "\n\t" \
|
||||
"com r27 " "\n\t" \
|
||||
"lsl r27 " "\n\t" \
|
||||
"lds r26, osc+2*%[mul]+%[vol] " "\n\t" \
|
||||
"subi r27, 128 " "\n\t" \
|
||||
"muls r27, r26 " "\n\t" \
|
||||
"lsl r1 " "\n\t" \
|
||||
"mov r26, r1 " "\n\t" \
|
||||
\
|
||||
"lds r18, osc+0*%[mul]+%[fre] " "\n\t" \
|
||||
"lds r0, osc+0*%[mul]+%[pha] " "\n\t" \
|
||||
"add r0, r18 " "\n\t" \
|
||||
"sts osc+0*%[mul]+%[pha], r0 " "\n\t" \
|
||||
"lds r18, osc+0*%[mul]+%[fre]+1" "\n\t" \
|
||||
"lds r1, osc+0*%[mul]+%[pha]+1" "\n\t" \
|
||||
"adc r1, r18 " "\n\t" \
|
||||
"sts osc+0*%[mul]+%[pha]+1, r1 " "\n\t" \
|
||||
\
|
||||
"mov r18, r1 " "\n\t" \
|
||||
"lsl r18 " "\n\t" \
|
||||
"and r18, r1 " "\n\t" \
|
||||
"lds r27, osc+0*%[mul]+%[vol] " "\n\t" \
|
||||
"sbrc r18, 7 " "\n\t" \
|
||||
"neg r27 " "\n\t" \
|
||||
"add r26, r27 " "\n\t" \
|
||||
\
|
||||
"lds r18, osc+1*%[mul]+%[fre] " "\n\t" \
|
||||
"lds r0, osc+1*%[mul]+%[pha] " "\n\t" \
|
||||
"add r0, r18 " "\n\t" \
|
||||
"sts osc+1*%[mul]+%[pha], r0 " "\n\t" \
|
||||
"lds r18, osc+1*%[mul]+%[fre]+1" "\n\t" \
|
||||
"lds r1, osc+1*%[mul]+%[pha]+1" "\n\t" \
|
||||
"adc r1, r18 " "\n\t" \
|
||||
"sts osc+1*%[mul]+%[pha]+1, r1 " "\n\t" \
|
||||
\
|
||||
"lds r27, osc+1*%[mul]+%[vol] " "\n\t" \
|
||||
"sbrc r1, 7 " "\n\t" \
|
||||
"neg r27 " "\n\t" \
|
||||
"add r26, r27 " "\n\t" \
|
||||
\
|
||||
"ldi r27, 1 " "\n\t" \
|
||||
"lds r0, osc+3*%[mul]+%[fre] " "\n\t" \
|
||||
"lds r1, osc+3*%[mul]+%[fre]+1" "\n\t" \
|
||||
"add r0, r0 " "\n\t" \
|
||||
"adc r1, r1 " "\n\t" \
|
||||
"sbrc r1, 7 " "\n\t" \
|
||||
"eor r0, r27 " "\n\t" \
|
||||
"sbrc r1, 6 " "\n\t" \
|
||||
"eor r0, r27 " "\n\t" \
|
||||
"sts osc+3*%[mul]+%[fre], r0 " "\n\t" \
|
||||
"sts osc+3*%[mul]+%[fre]+1, r1 " "\n\t" \
|
||||
\
|
||||
"lds r27, osc+3*%[mul]+%[vol] " "\n\t" \
|
||||
"sbrc r1, 7 " "\n\t" \
|
||||
"neg r27 " "\n\t" \
|
||||
"add r26, r27 " "\n\t" \
|
||||
\
|
||||
"lds r27, pcm " "\n\t" \
|
||||
"add r26, r27 " "\n\t" \
|
||||
"sts %[reg], r26 " "\n\t" \
|
||||
"sts %[reg2], r26 " "\n\t" \
|
||||
\
|
||||
"lds r27, cia_count+1 " "\n\t" \
|
||||
"lds r26, cia_count " "\n\t" \
|
||||
"sbiw r26, 1 " "\n\t" \
|
||||
"breq call_playroutine " "\n\t" \
|
||||
"sts cia_count+1, r27 " "\n\t" \
|
||||
"sts cia_count, r26 " "\n\t" \
|
||||
"rjmp 2f " "\n\t" \
|
||||
\
|
||||
"call_playroutine: " "\n\t" \
|
||||
\
|
||||
"lds r27, cia+1 " "\n\t" \
|
||||
"lds r26, cia " "\n\t" \
|
||||
"sts cia_count+1, r27 " "\n\t" \
|
||||
"sts cia_count, r26 " "\n\t" \
|
||||
\
|
||||
"sei " "\n\t" \
|
||||
"push r19 " "\n\t" \
|
||||
"push r20 " "\n\t" \
|
||||
"push r21 " "\n\t" \
|
||||
"push r22 " "\n\t" \
|
||||
"push r23 " "\n\t" \
|
||||
"push r24 " "\n\t" \
|
||||
"push r25 " "\n\t" \
|
||||
"push r30 " "\n\t" \
|
||||
"push r31 " "\n\t" \
|
||||
\
|
||||
"clr r1 " "\n\t" \
|
||||
"call ATM_playroutine " "\n\t" \
|
||||
\
|
||||
"pop r31 " "\n\t" \
|
||||
"pop r30 " "\n\t" \
|
||||
"pop r25 " "\n\t" \
|
||||
"pop r24 " "\n\t" \
|
||||
"pop r23 " "\n\t" \
|
||||
"pop r22 " "\n\t" \
|
||||
"pop r21 " "\n\t" \
|
||||
"pop r20 " "\n\t" \
|
||||
"pop r19 " "\n\t" \
|
||||
"2: " "\n\t" \
|
||||
"pop r1 " "\n\t" \
|
||||
"pop r0 " "\n\t" \
|
||||
"pop r26 " "\n\t" \
|
||||
"pop r27 " "\n\t" \
|
||||
"3: " "\n\t" \
|
||||
"pop r18 " "\n\t" \
|
||||
"out __SREG__, r2 " "\n\t" \
|
||||
"pop r2 " "\n\t" \
|
||||
"reti " "\n\t" \
|
||||
: \
|
||||
: [reg] "M" _SFR_MEM_ADDR(TARGET_REGISTER), \
|
||||
[reg2] "M" _SFR_MEM_ADDR(TARGET_REGISTER2), \
|
||||
[mul] "M" (sizeof(Oscillator)), \
|
||||
[pha] "M" (offsetof(Oscillator, phase)), \
|
||||
[fre] "M" (offsetof(Oscillator, freq)), \
|
||||
[vol] "M" (offsetof(Oscillator, vol)) \
|
||||
); \
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
#endif
|
||||
Loading…
Reference in New Issue