MD3x0: update radio driver
This commit is contained in:
Silvano Seva
parent
c34e4462c2
commit
0c4a0435a8
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@ -161,7 +161,9 @@ mdx_src = ['platform/drivers/ADC/ADC1_MDx.c',
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'platform/drivers/NVM/nvmem_MDx.c',
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'platform/drivers/audio/audio_MDx.c',
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'platform/drivers/baseband/HR_Cx000.cpp',
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'platform/drivers/tones/toneGenerator_MDx.cpp']
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'platform/drivers/tones/toneGenerator_MDx.cpp',
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'platform/drivers/SPI/spi_custom.c',
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'platform/drivers/SPI/spi_bitbang.c']
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##
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## GDx family: Radioddity GD-77 and Baofeng DM-1801
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@ -1,5 +1,5 @@
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/***************************************************************************
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* Copyright (C) 2021 - 2023 by Federico Amedeo Izzo IU2NUO, *
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* Copyright (C) 2021 - 2024 by Federico Amedeo Izzo IU2NUO, *
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* Niccolò Izzo IU2KIN *
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* Frederik Saraci IU2NRO *
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* Silvano Seva IU2KWO *
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@ -23,6 +23,7 @@
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#include <interfaces/radio.h>
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#include <peripherals/gpio.h>
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#include <calibInfo_MDx.h>
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#include <spi_bitbang.h>
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#include <hwconfig.h>
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#include <ADC1_MDx.h>
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#include <algorithm>
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@ -42,7 +43,7 @@ static uint8_t txpwr_hi = 0; // APC voltage for TX output pow
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static enum opstatus radioStatus; // Current operating status
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static HR_C5000& C5000 = HR_C5000::instance(); // HR_C5000 driver
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static HR_C5000 C5000((const struct spiDevice *) &c5000_spi, { DMR_CS });
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/*
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* Parameters for RSSI voltage (mV) to input power (dBm) conversion.
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@ -128,14 +129,13 @@ void radio_init(const rtxStatus_t *rtxState)
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nvm_readCalibData(&calData);
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/*
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* Enable and configure PLL
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* Enable and configure PLL and HR_C5000
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*/
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gpio_setPin(PLL_PWR);
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SKY73210_init();
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spiBitbang_init(&pll_spi);
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spiBitbang_init(&c5000_spi);
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/*
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* Configure HR_C5000
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*/
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gpio_setPin(PLL_PWR);
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SKY73210_init(&pll);
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C5000.init();
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/*
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@ -147,7 +147,7 @@ void radio_init(const rtxStatus_t *rtxState)
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void radio_terminate()
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{
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SKY73210_terminate();
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SKY73210_terminate(&pll);
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C5000.terminate();
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gpio_clearPin(PLL_PWR); // PLL off
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@ -251,7 +251,7 @@ void radio_enableRx()
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pllFreq -= static_cast< float >(IF_FREQ);
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}
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SKY73210_setFrequency(pllFreq, 5);
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SKY73210_setFrequency(&pll, pllFreq, 5);
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DAC->DHR12L1 = vtune_rx * 0xFF;
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gpio_setPin(RX_STG_EN); // Enable RX LNA
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@ -270,7 +270,7 @@ void radio_enableTx()
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// Set PLL frequency.
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float pllFreq = static_cast< float >(config->txFrequency);
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if(isVhfBand) pllFreq *= 2.0f;
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SKY73210_setFrequency(pllFreq, 5);
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SKY73210_setFrequency(&pll, pllFreq, 5);
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// Set TX output power, constrain between 1W and 5W.
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float power = static_cast < float >(config->txPower) / 1000.0f;
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@ -21,7 +21,35 @@
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#include <spi_bitbang.h>
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#include <spi_custom.h>
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#include <spi_stm32.h>
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#include <SKY72310.h>
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#include <hwconfig.h>
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#include <pinmap.h>
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const struct spiConfig spiPllCfg =
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{
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.clk = { PLL_CLK },
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.mosi = { PLL_DAT },
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.miso = { PLL_DAT },
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.clkPeriod = SCK_PERIOD_FROM_FREQ(1000000),
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.flags = SPI_HALF_DUPLEX
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};
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const struct spiConfig spiC5000Cfg =
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{
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.clk = { DMR_CLK },
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.mosi = { DMR_MOSI },
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.miso = { DMR_MISO },
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.clkPeriod = SCK_PERIOD_FROM_FREQ(1000000),
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.flags = SPI_FLAG_CPHA
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};
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SPI_STM32_DEVICE_DEFINE(nvm_spi, SPI1, NULL)
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SPI_BITBANG_DEVICE_DEFINE(pll_spi, spiPllCfg, NULL)
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SPI_BITBANG_DEVICE_DEFINE(c5000_spi, spiC5000Cfg, NULL)
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const struct sky73210 pll =
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{
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.spi = (const struct spiDevice *) &pll_spi,
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.cs = { PLL_CS },
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.refClk = 16800000
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};
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@ -28,6 +28,9 @@ extern "C" {
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#endif
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extern const struct spiDevice nvm_spi;
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extern const struct spiCustomDevice pll_spi;
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extern const struct spiCustomDevice c5000_spi;
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extern const struct sky73210 pll;
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/* Device has a working real time clock */
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#define CONFIG_RTC
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@ -87,13 +87,13 @@
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#define FLASH_SDI GPIOB,5
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/* PLL */
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#define PLL_CS GPIOD,11
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#define PLL_CS &GpioD,11
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#define PLL_CLK GPIOE,4
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#define PLL_DAT GPIOE,5 /* WARNING: this line is also HR_C5000 MOSI */
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#define PLL_LD GPIOD,10
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/* HR_C5000 */
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#define DMR_CS GPIOE,2
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#define DMR_CS &GpioE,2
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#define DMR_CLK GPIOC,13
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#define DMR_MOSI PLL_DAT
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#define DMR_MISO GPIOE,3
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