JKI757
|
e738e18d16
|
stm32h7xx: rcc: configure USART1/USART6 kernel clock source to pclk2
|
2025-08-19 08:45:29 +02:00 |
JKI757
|
ac04f247b0
|
stm32h7xx: rcc: set dividers for 200MHz APB bus clock
|
2025-08-19 08:42:30 +02:00 |
Silvano Seva
|
e2b3a62a8e
|
STM32H7: rcc: added rcc_getPeriphClock function
|
2025-08-13 18:56:25 +02:00 |
Silvano Seva
|
e66125fafc
|
STM32H: drivers: renamed pll sources to "rcc"
|
2025-08-13 18:56:25 +02:00 |
Silvano Seva
|
03d1ae5546
|
Updated year in copyright headers
|
2025-04-04 21:15:39 +02:00 |
Silvano Seva
|
3d04759e8d
|
Audio: STM32 DAC: extended driver to STM32H7 family
|
2025-03-20 20:35:23 +01:00 |
Silvano Seva
|
dfb24c95e8
|
Drivers: SPI: added driver for STM32H7 devices
|
2025-03-20 20:35:23 +01:00 |
Silvano Seva
|
7b35715ee4
|
STM32H7: driver for LPTIM peripheral
|
2025-03-20 20:35:23 +01:00 |
Silvano Seva
|
54d675155d
|
STM32H7: set up PLL2 to have a 168MHz clock source
|
2025-03-16 17:53:38 +01:00 |
Silvano Seva
|
959e9df457
|
Added support for STM32H743 MCU
|
2025-03-16 17:50:19 +01:00 |