3 Commits

Author	SHA1	Message	Date
JKI757	e738e18d16	stm32h7xx: rcc: configure USART1/USART6 kernel clock source to pclk2	2025-08-19 08:45:29 +02:00
JKI757	ac04f247b0	stm32h7xx: rcc: set dividers for 200MHz APB bus clock	2025-08-19 08:42:30 +02:00
Silvano Seva	e66125fafc	STM32H: drivers: renamed pll sources to "rcc"	2025-08-13 18:56:25 +02:00

Renamed from platform/mcu/STM32H7xx/drivers/pll.cpp (Browse further)